806-dma-0020-MLK-22798-1-dmaengine-fsl-edma-v3-do-not-enable-inte.patch

From dcb4deb92738a2fd3981550dbf18ae96e22bbe80 Mon Sep 17 00:00:00 2001
From: Robin Gong <yibin.gong@nxp.com>
Date: Wed, 23 Oct 2019 00:33:42 +0800
Subject: [PATCH] MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt
 in dev_2_dev

Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f0a3172e1ceb04c46377160486ad7dc6ee022850)
---
 drivers/dma/fsl-edma-v3.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

--- a/drivers/dma/fsl-edma-v3.c
+++ b/drivers/dma/fsl-edma-v3.c
@@ -560,6 +560,7 @@ static struct dma_async_tx_descriptor *f
 	int sg_len, i;
 	u32 src_addr, dst_addr, last_sg, nbytes;
 	u16 soff, doff, iter;
+	bool major_int = true;
 
 	sg_len = buf_len / period_len;
 	fsl_desc = fsl_edma3_alloc_desc(fsl_chan, sg_len);
@@ -600,11 +601,12 @@ static struct dma_async_tx_descriptor *f
 			dst_addr = fsl_chan->fsc.dev_addr;
 			soff = 0;
 			doff = 0;
+			major_int = false;
 		}
 
 		fsl_edma3_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr,
 				dst_addr, fsl_chan->fsc.attr, soff, nbytes, 0,
-				iter, iter, doff, last_sg, true, false, true);
+				iter, iter, doff, last_sg, major_int, false, true);
 		dma_buf_next += period_len;
 	}