mt7620a_bdcom_wap2100-sk.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;

#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "bdcom,wap2100-sk", "ralink,mt7620a-soc";
	model = "BDCOM WAP2100-SK";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	leds {
		compatible = "gpio-leds";

		usb {
			label = "wap2100-sk:green:usb";
			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
			trigger-sources = <&ohci_port1>, <&ehci_port1>;
			linux,default-trigger = "usbport";
		};

		led_power: wps {
			label = "wap2100-sk:green:wps";
			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "wap2100-sk:green:wlan2g";
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		wps {
			label = "wps";
			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};

		reset {
			label = "reset";
			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xf70000>;
			};
		};
	};
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&sdhci {
	status = "okay";
};

&ehci {
	status = "okay";
};

&ohci {
	status = "okay";
};

&ethernet {
	mtd-mac-address = <&factory 0x4>;

	mediatek,portmap = "llllw";
};

&wmac {
	ralink,mtd-eeprom = <&factory 0x0>;
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&state_default {
	default {
		groups = "spi refclk", "uartf", "wled";
		function = "gpio";
	};
};