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RF24.cpp
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RF24.cpp
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/*
Copyright (C) 2011 J. Coliz <maniacbug@ymail.com>
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
version 2 as published by the Free Software Foundation.
*/
#include "nRF24L01.h"
#include "RF24_config.h"
#include "RF24.h"
/****************************************************************************/
void RF24::csn(bool mode)
{
#if defined(RF24_TINY)
if (ce_pin != csn_pin) {
digitalWrite(csn_pin, mode);
}
else {
if (mode == HIGH) {
PORTB |= (1 << PINB2); // SCK->CSN HIGH
delayMicroseconds(RF24_CSN_SETTLE_HIGH_DELAY); // allow csn to settle.
}
else {
PORTB &= ~(1 << PINB2); // SCK->CSN LOW
delayMicroseconds(RF24_CSN_SETTLE_LOW_DELAY); // allow csn to settle
}
}
// Return, CSN toggle complete
return;
#elif defined(ARDUINO) && !defined(RF24_SPI_TRANSACTIONS)
// Minimum ideal SPI bus speed is 2x data rate
// If we assume 2Mbs data rate and 16Mhz clock, a
// divider of 4 is the minimum we want.
// CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
#if !defined(SOFTSPI)
// applies to SPI_UART and inherent hardware SPI
#if defined(RF24_SPI_PTR)
_spi->setBitOrder(MSBFIRST);
_spi->setDataMode(SPI_MODE0);
#if !defined(F_CPU) || F_CPU < 20000000
_spi->setClockDivider(SPI_CLOCK_DIV2);
#elif F_CPU < 40000000
_spi->setClockDivider(SPI_CLOCK_DIV4);
#elif F_CPU < 80000000
_spi->setClockDivider(SPI_CLOCK_DIV8);
#elif F_CPU < 160000000
_spi->setClockDivider(SPI_CLOCK_DIV16);
#elif F_CPU < 320000000
_spi->setClockDivider(SPI_CLOCK_DIV32);
#elif F_CPU < 640000000
_spi->setClockDivider(SPI_CLOCK_DIV64);
#elif F_CPU < 1280000000
_spi->setClockDivider(SPI_CLOCK_DIV128);
#else // F_CPU >= 1280000000
#error "Unsupported CPU frequency. Please set correct SPI divider."
#endif // F_CPU to SPI_CLOCK_DIV translation
#else // !defined(RF24_SPI_PTR)
_SPI.setBitOrder(MSBFIRST);
_SPI.setDataMode(SPI_MODE0);
#if !defined(F_CPU) || F_CPU < 20000000
_SPI.setClockDivider(SPI_CLOCK_DIV2);
#elif F_CPU < 40000000
_SPI.setClockDivider(SPI_CLOCK_DIV4);
#elif F_CPU < 80000000
_SPI.setClockDivider(SPI_CLOCK_DIV8);
#elif F_CPU < 160000000
_SPI.setClockDivider(SPI_CLOCK_DIV16);
#elif F_CPU < 320000000
_SPI.setClockDivider(SPI_CLOCK_DIV32);
#elif F_CPU < 640000000
_SPI.setClockDivider(SPI_CLOCK_DIV64);
#elif F_CPU < 1280000000
_SPI.setClockDivider(SPI_CLOCK_DIV128);
#else // F_CPU >= 1280000000
#error "Unsupported CPU frequency. Please set correct SPI divider."
#endif // F_CPU to SPI_CLOCK_DIV translation
#endif // !defined(RF24_SPI_PTR)
#endif // !defined(SOFTSPI)
#elif defined(RF24_RPi)
if (!mode)
_SPI.chipSelect(csn_pin);
#endif // defined(RF24_RPi)
#if !defined(RF24_LINUX)
digitalWrite(csn_pin, mode);
delayMicroseconds(csDelay);
#else
static_cast<void>(mode); // ignore -Wunused-parameter
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
void RF24::ce(bool level)
{
//Allow for 3-pin use on ATTiny
if (ce_pin != csn_pin) {
digitalWrite(ce_pin, level);
}
}
/****************************************************************************/
inline void RF24::beginTransaction()
{
#if defined(RF24_SPI_TRANSACTIONS)
#if defined(RF24_SPI_PTR)
#if defined(RF24_RP2)
_spi->beginTransaction(spi_speed);
#else // ! defined (RF24_RP2)
_spi->beginTransaction(SPISettings(spi_speed, MSBFIRST, SPI_MODE0));
#endif // ! defined (RF24_RP2)
#else // !defined(RF24_SPI_PTR)
_SPI.beginTransaction(SPISettings(spi_speed, MSBFIRST, SPI_MODE0));
#endif // !defined(RF24_SPI_PTR)
#endif // defined (RF24_SPI_TRANSACTIONS)
csn(LOW);
}
/****************************************************************************/
inline void RF24::endTransaction()
{
csn(HIGH);
#if defined(RF24_SPI_TRANSACTIONS)
#if defined(RF24_SPI_PTR)
_spi->endTransaction();
#else // !defined(RF24_SPI_PTR)
_SPI.endTransaction();
#endif // !defined(RF24_SPI_PTR)
#endif // defined (RF24_SPI_TRANSACTIONS)
}
/****************************************************************************/
void RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len)
{
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction(); //configures the spi settings for RPi, locks mutex and setting csn low
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
uint8_t size = static_cast<uint8_t>(len + 1); // Add register value to transmit buffer
*ptx++ = (R_REGISTER | reg);
while (len--) {
*ptx++ = RF24_NOP; // Dummy operation, just for reading
}
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, size);
#else // !defined (RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), size);
#endif // !defined (RF24_RP2)
status = *prx++; // status is 1st byte of receive buffer
// decrement before to skip status byte
while (--size) {
*buf++ = *prx++;
}
endTransaction(); // unlocks mutex and setting csn high
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(R_REGISTER | reg);
while (len--) {
*buf++ = _spi->transfer(0xFF);
}
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(R_REGISTER | reg);
while (len--) {
*buf++ = _SPI.transfer(0xFF);
}
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
}
/****************************************************************************/
uint8_t RF24::read_register(uint8_t reg)
{
uint8_t result;
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction();
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
*ptx++ = (R_REGISTER | reg);
*ptx++ = RF24_NOP; // Dummy operation, just for reading
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, 2);
#else // !defined(RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), 2);
#endif // !defined(RF24_RP2)
status = *prx; // status is 1st byte of receive buffer
result = *++prx; // result is 2nd byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(R_REGISTER | reg);
result = _spi->transfer(0xff);
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(R_REGISTER | reg);
result = _SPI.transfer(0xff);
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
return result;
}
/****************************************************************************/
void RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
{
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction();
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
uint8_t size = static_cast<uint8_t>(len + 1); // Add register value to transmit buffer
*ptx++ = (W_REGISTER | (REGISTER_MASK & reg));
while (len--) {
*ptx++ = *buf++;
}
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, size);
#else // !defined(RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), size);
#endif // !defined(RF24_RP2)
status = *prx; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(W_REGISTER | reg);
while (len--) {
_spi->transfer(*buf++);
}
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(W_REGISTER | reg);
while (len--) {
_SPI.transfer(*buf++);
}
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
}
/****************************************************************************/
void RF24::write_register(uint8_t reg, uint8_t value, bool is_cmd_only)
{
if (is_cmd_only) {
if (reg != RF24_NOP) { // don't print the get_status() operation
IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x)\r\n"), reg));
}
beginTransaction();
#if defined(RF24_LINUX)
status = _SPI.transfer(W_REGISTER | reg);
#else // !defined(RF24_LINUX) || defined (RF24_RP2)
#if defined(RF24_SPI_PTR)
status = _spi->transfer(W_REGISTER | reg);
#else // !defined (RF24_SPI_PTR)
status = _SPI.transfer(W_REGISTER | reg);
#endif // !defined (RF24_SPI_PTR)
#endif // !defined(RF24_LINUX) || defined(RF24_RP2)
endTransaction();
}
else {
IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\r\n"), reg, value));
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction();
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
*ptx++ = (W_REGISTER | reg);
*ptx = value;
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, 2);
#else // !defined(RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), 2);
#endif // !defined(RF24_RP2)
status = *prx++; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(W_REGISTER | reg);
_spi->transfer(value);
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(W_REGISTER | reg);
_SPI.transfer(value);
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
}
}
/****************************************************************************/
void RF24::write_payload(const void* buf, uint8_t data_len, const uint8_t writeType)
{
const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
uint8_t blank_len = !data_len ? 1 : 0;
if (!dynamic_payloads_enabled) {
data_len = rf24_min(data_len, payload_size);
blank_len = static_cast<uint8_t>(payload_size - data_len);
}
else {
data_len = rf24_min(data_len, static_cast<uint8_t>(32));
}
//printf("[Writing %u bytes %u blanks]",data_len,blank_len);
IF_SERIAL_DEBUG(printf("[Writing %u bytes %u blanks]\n", data_len, blank_len););
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction();
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
uint8_t size;
size = static_cast<uint8_t>(data_len + blank_len + 1); // Add register value to transmit buffer
*ptx++ = writeType;
while (data_len--) {
*ptx++ = *current++;
}
while (blank_len--) {
*ptx++ = 0;
}
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, size);
#else // !defined(RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), size);
#endif // !defined(RF24_RP2)
status = *prx; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(writeType);
while (data_len--) {
_spi->transfer(*current++);
}
while (blank_len--) {
_spi->transfer(0);
}
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(writeType);
while (data_len--) {
_SPI.transfer(*current++);
}
while (blank_len--) {
_SPI.transfer(0);
}
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
}
/****************************************************************************/
void RF24::read_payload(void* buf, uint8_t data_len)
{
uint8_t* current = reinterpret_cast<uint8_t*>(buf);
uint8_t blank_len = 0;
if (!dynamic_payloads_enabled) {
data_len = rf24_min(data_len, payload_size);
blank_len = static_cast<uint8_t>(payload_size - data_len);
}
else {
data_len = rf24_min(data_len, static_cast<uint8_t>(32));
}
//printf("[Reading %u bytes %u blanks]",data_len,blank_len);
IF_SERIAL_DEBUG(printf("[Reading %u bytes %u blanks]\n", data_len, blank_len););
#if defined(RF24_LINUX) || defined(RF24_RP2)
beginTransaction();
uint8_t* prx = spi_rxbuff;
uint8_t* ptx = spi_txbuff;
uint8_t size;
size = static_cast<uint8_t>(data_len + blank_len + 1); // Add register value to transmit buffer
*ptx++ = R_RX_PAYLOAD;
while (--size) {
*ptx++ = RF24_NOP;
}
size = static_cast<uint8_t>(data_len + blank_len + 1); // Size has been lost during while, re affect
#if defined(RF24_RP2)
_spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, size);
#else // !defined(RF24_RP2)
_SPI.transfernb(reinterpret_cast<char*>(spi_txbuff), reinterpret_cast<char*>(spi_rxbuff), size);
#endif // !defined(RF24_RP2)
status = *prx++; // 1st byte is status
if (data_len > 0) {
// Decrement before to skip 1st status byte
while (--data_len) {
*current++ = *prx++;
}
*current = *prx;
}
endTransaction();
#else // !defined(RF24_LINUX) && !defined(RF24_RP2)
beginTransaction();
#if defined(RF24_SPI_PTR)
status = _spi->transfer(R_RX_PAYLOAD);
while (data_len--) {
*current++ = _spi->transfer(0xFF);
}
while (blank_len--) {
_spi->transfer(0xFF);
}
#else // !defined(RF24_SPI_PTR)
status = _SPI.transfer(R_RX_PAYLOAD);
while (data_len--) {
*current++ = _SPI.transfer(0xFF);
}
while (blank_len--) {
_SPI.transfer(0xff);
}
#endif // !defined(RF24_SPI_PTR)
endTransaction();
#endif // !defined(RF24_LINUX) && !defined(RF24_RP2)
}
/****************************************************************************/
uint8_t RF24::flush_rx(void)
{
write_register(FLUSH_RX, RF24_NOP, true);
return status;
}
/****************************************************************************/
uint8_t RF24::flush_tx(void)
{
write_register(FLUSH_TX, RF24_NOP, true);
return status;
}
/****************************************************************************/
uint8_t RF24::get_status(void)
{
write_register(RF24_NOP, RF24_NOP, true);
return status;
}
/****************************************************************************/
#if !defined(MINIMAL)
void RF24::print_status(uint8_t _status)
{
printf_P(PSTR("STATUS\t\t= 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n"), _status, (_status & _BV(RX_DR)) ? 1 : 0,
(_status & _BV(TX_DS)) ? 1 : 0, (_status & _BV(MAX_RT)) ? 1 : 0, ((_status >> RX_P_NO) & 0x07), (_status & _BV(TX_FULL)) ? 1 : 0);
}
/****************************************************************************/
void RF24::print_observe_tx(uint8_t value)
{
printf_P(PSTR("OBSERVE_TX=%02x: PLOS_CNT=%x ARC_CNT=%x\r\n"), value, (value >> PLOS_CNT) & 0x0F, (value >> ARC_CNT) & 0x0F);
}
/****************************************************************************/
void RF24::print_byte_register(const char* name, uint8_t reg, uint8_t qty)
{
printf_P(PSTR(PRIPSTR
"\t="),
name);
while (qty--) {
printf_P(PSTR(" 0x%02x"), read_register(reg++));
}
printf_P(PSTR("\r\n"));
}
/****************************************************************************/
void RF24::print_address_register(const char* name, uint8_t reg, uint8_t qty)
{
printf_P(PSTR(PRIPSTR
"\t="),
name);
while (qty--) {
uint8_t* buffer = new uint8_t[addr_width];
read_register(reg++ & REGISTER_MASK, buffer, addr_width);
printf_P(PSTR(" 0x"));
uint8_t* bufptr = buffer + addr_width;
while (--bufptr >= buffer) {
printf_P(PSTR("%02x"), *bufptr); // NOLINT: clang-tidy seems to emit a false positive about zero-allocated memory here (*bufptr)
}
delete[] buffer;
}
printf_P(PSTR("\r\n"));
}
/****************************************************************************/
uint8_t RF24::sprintf_address_register(char* out_buffer, uint8_t reg, uint8_t qty)
{
uint8_t offset = 0;
uint8_t* read_buffer = new uint8_t[addr_width];
while (qty--) {
read_register(reg++ & REGISTER_MASK, read_buffer, addr_width);
uint8_t* bufptr = read_buffer + addr_width;
while (--bufptr >= read_buffer) {
offset += sprintf_P(out_buffer + offset, PSTR("%02X"), *bufptr);
}
}
delete[] read_buffer;
return offset;
}
#endif // !defined(MINIMAL)
/****************************************************************************/
RF24::RF24(uint16_t _cepin, uint16_t _cspin, uint32_t _spi_speed)
: ce_pin(_cepin), csn_pin(_cspin), spi_speed(_spi_speed), payload_size(32), _is_p_variant(false), _is_p0_rx(false), addr_width(5), dynamic_payloads_enabled(true), csDelay(5)
{
_init_obj();
}
/****************************************************************************/
RF24::RF24(uint32_t _spi_speed)
: ce_pin(0xFFFF), csn_pin(0xFFFF), spi_speed(_spi_speed), payload_size(32), _is_p_variant(false), _is_p0_rx(false), addr_width(5), dynamic_payloads_enabled(true), csDelay(5)
{
_init_obj();
}
/****************************************************************************/
void RF24::_init_obj()
{
// Use a pointer on the Arduino platform
#if defined(RF24_SPI_PTR) && !defined(RF24_RP2)
_spi = &SPI;
#endif // defined (RF24_SPI_PTR)
pipe0_reading_address[0] = 0;
if (spi_speed <= 35000) { //Handle old BCM2835 speed constants, default to RF24_SPI_SPEED
spi_speed = RF24_SPI_SPEED;
}
}
/****************************************************************************/
void RF24::setChannel(uint8_t channel)
{
const uint8_t max_channel = 125;
write_register(RF_CH, rf24_min(channel, max_channel));
}
uint8_t RF24::getChannel()
{
return read_register(RF_CH);
}
/****************************************************************************/
void RF24::setPayloadSize(uint8_t size)
{
// payload size must be in range [1, 32]
payload_size = static_cast<uint8_t>(rf24_max(1, rf24_min(32, size)));
// write static payload size setting for all pipes
for (uint8_t i = 0; i < 6; ++i) {
write_register(static_cast<uint8_t>(RX_PW_P0 + i), payload_size);
}
}
/****************************************************************************/
uint8_t RF24::getPayloadSize(void)
{
return payload_size;
}
/****************************************************************************/
#if !defined(MINIMAL)
static const PROGMEM char rf24_datarate_e_str_0[] = "= 1 MBPS";
static const PROGMEM char rf24_datarate_e_str_1[] = "= 2 MBPS";
static const PROGMEM char rf24_datarate_e_str_2[] = "= 250 KBPS";
static const PROGMEM char* const rf24_datarate_e_str_P[] = {
rf24_datarate_e_str_0,
rf24_datarate_e_str_1,
rf24_datarate_e_str_2,
};
static const PROGMEM char rf24_model_e_str_0[] = "nRF24L01";
static const PROGMEM char rf24_model_e_str_1[] = "nRF24L01+";
static const PROGMEM char* const rf24_model_e_str_P[] = {
rf24_model_e_str_0,
rf24_model_e_str_1,
};
static const PROGMEM char rf24_crclength_e_str_0[] = "= Disabled";
static const PROGMEM char rf24_crclength_e_str_1[] = "= 8 bits";
static const PROGMEM char rf24_crclength_e_str_2[] = "= 16 bits";
static const PROGMEM char* const rf24_crclength_e_str_P[] = {
rf24_crclength_e_str_0,
rf24_crclength_e_str_1,
rf24_crclength_e_str_2,
};
static const PROGMEM char rf24_pa_dbm_e_str_0[] = "= PA_MIN";
static const PROGMEM char rf24_pa_dbm_e_str_1[] = "= PA_LOW";
static const PROGMEM char rf24_pa_dbm_e_str_2[] = "= PA_HIGH";
static const PROGMEM char rf24_pa_dbm_e_str_3[] = "= PA_MAX";
static const PROGMEM char* const rf24_pa_dbm_e_str_P[] = {
rf24_pa_dbm_e_str_0,
rf24_pa_dbm_e_str_1,
rf24_pa_dbm_e_str_2,
rf24_pa_dbm_e_str_3,
};
#if defined(RF24_LINUX)
static const char rf24_csn_e_str_0[] = "CE0 (PI Hardware Driven)";
static const char rf24_csn_e_str_1[] = "CE1 (PI Hardware Driven)";
static const char rf24_csn_e_str_2[] = "CE2 (PI Hardware Driven)";
static const char rf24_csn_e_str_3[] = "Custom GPIO Software Driven";
static const char* const rf24_csn_e_str_P[] = {
rf24_csn_e_str_0,
rf24_csn_e_str_1,
rf24_csn_e_str_2,
rf24_csn_e_str_3,
};
#endif // defined(RF24_LINUX)
static const PROGMEM char rf24_feature_e_str_on[] = "= Enabled";
static const PROGMEM char rf24_feature_e_str_allowed[] = "= Allowed";
static const PROGMEM char rf24_feature_e_str_open[] = " open ";
static const PROGMEM char rf24_feature_e_str_closed[] = "closed";
static const PROGMEM char* const rf24_feature_e_str_P[] = {
rf24_crclength_e_str_0,
rf24_feature_e_str_on,
rf24_feature_e_str_allowed,
rf24_feature_e_str_closed,
rf24_feature_e_str_open,
};
void RF24::printDetails(void)
{
#if defined(RF24_LINUX)
printf("================ SPI Configuration ================\n");
uint8_t bus_ce = static_cast<uint8_t>(csn_pin % 10);
uint8_t bus_numb = static_cast<uint8_t>((csn_pin - bus_ce) / 10);
printf("CSN Pin\t\t= /dev/spidev%d.%d\n", bus_numb, bus_ce);
printf("CE Pin\t\t= Custom GPIO%d\n", ce_pin);
#endif
printf_P(PSTR("SPI Speedz\t= %d Mhz\n"), static_cast<uint8_t>(spi_speed / 1000000)); //Print the SPI speed on non-Linux devices
#if defined(RF24_LINUX)
printf("================ NRF Configuration ================\n");
#endif // defined(RF24_LINUX)
print_status(get_status());
print_address_register(PSTR("RX_ADDR_P0-1"), RX_ADDR_P0, 2);
print_byte_register(PSTR("RX_ADDR_P2-5"), RX_ADDR_P2, 4);
print_address_register(PSTR("TX_ADDR\t"), TX_ADDR);
print_byte_register(PSTR("RX_PW_P0-6"), RX_PW_P0, 6);
print_byte_register(PSTR("EN_AA\t"), EN_AA);
print_byte_register(PSTR("EN_RXADDR"), EN_RXADDR);
print_byte_register(PSTR("RF_CH\t"), RF_CH);
print_byte_register(PSTR("RF_SETUP"), RF_SETUP);
print_byte_register(PSTR("CONFIG\t"), NRF_CONFIG);
print_byte_register(PSTR("DYNPD/FEATURE"), DYNPD, 2);
printf_P(PSTR("Data Rate\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_datarate_e_str_P[getDataRate()])));
printf_P(PSTR("Model\t\t= " PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_model_e_str_P[isPVariant()])));
printf_P(PSTR("CRC Length\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_crclength_e_str_P[getCRCLength()])));
printf_P(PSTR("PA Power\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_pa_dbm_e_str_P[getPALevel()])));
printf_P(PSTR("ARC\t\t= %d\r\n"), getARC());
}
void RF24::printPrettyDetails(void)
{
#if defined(RF24_LINUX)
printf("================ SPI Configuration ================\n");
uint8_t bus_ce = static_cast<uint8_t>(csn_pin % 10);
uint8_t bus_numb = static_cast<uint8_t>((csn_pin - bus_ce) / 10);
printf("CSN Pin\t\t\t= /dev/spidev%d.%d\n", bus_numb, bus_ce);
printf("CE Pin\t\t\t= Custom GPIO%d\n", ce_pin);
#endif
printf_P(PSTR("SPI Frequency\t\t= %d Mhz\n"), static_cast<uint8_t>(spi_speed / 1000000)); //Print the SPI speed on non-Linux devices
#if defined(RF24_LINUX)
printf("================ NRF Configuration ================\n");
#endif // defined(RF24_LINUX)
uint8_t channel = getChannel();
uint16_t frequency = static_cast<uint16_t>(channel + 2400);
printf_P(PSTR("Channel\t\t\t= %u (~ %u MHz)\r\n"), channel, frequency);
printf_P(PSTR("Model\t\t\t= " PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_model_e_str_P[isPVariant()])));
printf_P(PSTR("RF Data Rate\t\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_datarate_e_str_P[getDataRate()])));
printf_P(PSTR("RF Power Amplifier\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_pa_dbm_e_str_P[getPALevel()])));
printf_P(PSTR("RF Low Noise Amplifier\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[(read_register(RF_SETUP) & 1) * 1])));
printf_P(PSTR("CRC Length\t\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_crclength_e_str_P[getCRCLength()])));
printf_P(PSTR("Address Length\t\t= %d bytes\r\n"), (read_register(SETUP_AW) & 3) + 2);
printf_P(PSTR("Static Payload Length\t= %d bytes\r\n"), getPayloadSize());
uint8_t setupRetry = read_register(SETUP_RETR);
printf_P(PSTR("Auto Retry Delay\t= %d microseconds\r\n"), (setupRetry >> ARD) * 250 + 250);
printf_P(PSTR("Auto Retry Attempts\t= %d maximum\r\n"), setupRetry & 0x0F);
uint8_t observeTx = read_register(OBSERVE_TX);
printf_P(PSTR("Packets lost on\n current channel\t= %d\r\n"), observeTx >> 4);
printf_P(PSTR("Retry attempts made for\n last transmission\t= %d\r\n"), observeTx & 0x0F);
uint8_t features = read_register(FEATURE);
printf_P(PSTR("Multicast\t\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(features & _BV(EN_DYN_ACK)) * 2])));
printf_P(PSTR("Custom ACK Payload\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(features & _BV(EN_ACK_PAY)) * 1])));
uint8_t dynPl = read_register(DYNPD);
printf_P(PSTR("Dynamic Payloads\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[(dynPl && (features & _BV(EN_DPL))) * 1])));
uint8_t autoAck = read_register(EN_AA);
if (autoAck == 0x3F || autoAck == 0) {
// all pipes have the same configuration about auto-ack feature
printf_P(PSTR("Auto Acknowledgment\t" PRIPSTR
"\r\n"),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(autoAck) * 1])));
}
else {
// representation per pipe
printf_P(PSTR("Auto Acknowledgment\t= 0b%c%c%c%c%c%c\r\n"),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P5)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P4)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P3)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P2)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P1)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P0)) + 48));
}
config_reg = read_register(NRF_CONFIG);
printf_P(PSTR("Primary Mode\t\t= %cX\r\n"), config_reg & _BV(PRIM_RX) ? 'R' : 'T');
print_address_register(PSTR("TX address\t"), TX_ADDR);
uint8_t openPipes = read_register(EN_RXADDR);
for (uint8_t i = 0; i < 6; ++i) {
bool isOpen = openPipes & _BV(i);
printf_P(PSTR("pipe %u (" PRIPSTR
") bound"),
i, (char*)(pgm_read_ptr(&rf24_feature_e_str_P[isOpen + 3])));
if (i < 2) {
print_address_register(PSTR(""), static_cast<uint8_t>(RX_ADDR_P0 + i));
}
else {
print_byte_register(PSTR(""), static_cast<uint8_t>(RX_ADDR_P0 + i));
}
}
}
/****************************************************************************/
uint16_t RF24::sprintfPrettyDetails(char* debugging_information)
{
const char* format_string = PSTR(
"================ SPI Configuration ================\n"
"CSN Pin\t\t\t= %d\n"
"CE Pin\t\t\t= %d\n"
"SPI Frequency\t\t= %d Mhz\n"
"================ NRF Configuration ================\n"
"Channel\t\t\t= %u (~ %u MHz)\n"
"RF Data Rate\t\t" PRIPSTR "\n"
"RF Power Amplifier\t" PRIPSTR "\n"
"RF Low Noise Amplifier\t" PRIPSTR "\n"
"CRC Length\t\t" PRIPSTR "\n"
"Address Length\t\t= %d bytes\n"
"Static Payload Length\t= %d bytes\n"
"Auto Retry Delay\t= %d microseconds\n"
"Auto Retry Attempts\t= %d maximum\n"
"Packets lost on\n current channel\t= %d\r\n"
"Retry attempts made for\n last transmission\t= %d\r\n"
"Multicast\t\t" PRIPSTR "\n"
"Custom ACK Payload\t" PRIPSTR "\n"
"Dynamic Payloads\t" PRIPSTR "\n"
"Auto Acknowledgment\t");
const char* format_str2 = PSTR("\nPrimary Mode\t\t= %cX\nTX address\t\t= 0x");
const char* format_str3 = PSTR("\nPipe %d (" PRIPSTR ") bound\t= 0x");
uint16_t offset = sprintf_P(
debugging_information, format_string, csn_pin, ce_pin,
static_cast<uint8_t>(spi_speed / 1000000), getChannel(),
static_cast<uint16_t>(getChannel() + 2400),
(char*)(pgm_read_ptr(&rf24_datarate_e_str_P[getDataRate()])),
(char*)(pgm_read_ptr(&rf24_pa_dbm_e_str_P[getPALevel()])),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[(read_register(RF_SETUP) & 1) * 1])),
(char*)(pgm_read_ptr(&rf24_crclength_e_str_P[getCRCLength()])),
((read_register(SETUP_AW) & 3) + 2), getPayloadSize(),
((read_register(SETUP_RETR) >> ARD) * 250 + 250),
(read_register(SETUP_RETR) & 0x0F), (read_register(OBSERVE_TX) >> 4),
(read_register(OBSERVE_TX) & 0x0F),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(read_register(FEATURE) & _BV(EN_DYN_ACK)) * 2])),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(read_register(FEATURE) & _BV(EN_ACK_PAY)) * 1])),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[(read_register(DYNPD) && (read_register(FEATURE) & _BV(EN_DPL))) * 1])));
uint8_t autoAck = read_register(EN_AA);
if (autoAck == 0x3F || autoAck == 0) {
// all pipes have the same configuration about auto-ack feature
offset += sprintf_P(
debugging_information + offset, PSTR("" PRIPSTR ""),
(char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(autoAck) * 1])));
}
else {
// representation per pipe
offset += sprintf_P(
debugging_information + offset, PSTR("= 0b%c%c%c%c%c%c"),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P5)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P4)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P3)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P2)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P1)) + 48),
static_cast<char>(static_cast<bool>(autoAck & _BV(ENAA_P0)) + 48));
}
offset += sprintf_P(
debugging_information + offset, format_str2,
(read_register(NRF_CONFIG) & _BV(PRIM_RX) ? 'R' : 'T'));
offset += sprintf_address_register(debugging_information + offset, TX_ADDR);
uint8_t openPipes = read_register(EN_RXADDR);
for (uint8_t i = 0; i < 6; ++i) {
offset += sprintf_P(
debugging_information + offset, format_str3,
i, ((char*)(pgm_read_ptr(&rf24_feature_e_str_P[static_cast<bool>(openPipes & _BV(i)) + 3]))));
if (i < 2) {
offset += sprintf_address_register(
debugging_information + offset, static_cast<uint8_t>(RX_ADDR_P0 + i));
}
else {
offset += sprintf_P(
debugging_information + offset, PSTR("%02X"),
read_register(static_cast<uint8_t>(RX_ADDR_P0 + i)));
}
}
return offset;
}
/****************************************************************************/
void RF24::encodeRadioDetails(uint8_t* encoded_details)
{
uint8_t end = FEATURE + 1;
for (uint8_t i = NRF_CONFIG; i < end; ++i) {
if (i == RX_ADDR_P0 || i == RX_ADDR_P1 || i == TX_ADDR) {
// get 40-bit registers
read_register(i, encoded_details, 5);
encoded_details += 5;
}
else if (i != 0x18 && i != 0x19 && i != 0x1a && i != 0x1b) { // skip undocumented registers
// get single byte registers
*encoded_details++ = read_register(i);
}
}
*encoded_details++ = ce_pin >> 4;
*encoded_details++ = ce_pin & 0xFF;
*encoded_details++ = csn_pin >> 4;
*encoded_details++ = csn_pin & 0xFF;
*encoded_details = static_cast<uint8_t>((spi_speed / 1000000) | _BV(_is_p_variant * 4));
}
#endif // !defined(MINIMAL)
/****************************************************************************/
#if defined(RF24_SPI_PTR) || defined(DOXYGEN_FORCED)
// does not apply to RF24_LINUX
bool RF24::begin(_SPI* spiBus)
{
_spi = spiBus;
return _init_pins() && _init_radio();
}
/****************************************************************************/
bool RF24::begin(_SPI* spiBus, uint16_t _cepin, uint16_t _cspin)
{
ce_pin = _cepin;
csn_pin = _cspin;
return begin(spiBus);
}
#endif // defined (RF24_SPI_PTR) || defined (DOXYGEN_FORCED)
/****************************************************************************/
bool RF24::begin(uint16_t _cepin, uint16_t _cspin)
{
ce_pin = _cepin;
csn_pin = _cspin;
return begin();
}
/****************************************************************************/
bool RF24::begin(void)
{
#if defined(RF24_LINUX)
#if defined(RF24_RPi)
switch (csn_pin) { // Ensure valid hardware CS pin
case 0: break;
case 1: break;
// Allow BCM2835 enums for RPi
case 8: csn_pin = 0; break;
case 7: csn_pin = 1; break;
case 18: csn_pin = 10; break; // to make it work on SPI1
case 17: csn_pin = 11; break;
case 16: csn_pin = 12; break;
default: csn_pin = 0; break;
}
#endif // RF24_RPi
_SPI.begin(csn_pin, spi_speed);
#elif defined(XMEGA_D3)
_spi->begin(csn_pin);