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Added checks for accidentally disabling SPIEN or enabling RSTDISBL
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I hope that I'm wrong but I think that your SPIEN bit is wrong! It's 0x20, not 0x40. Read your own def in fuse calc sketch or fuse page.
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You are right. Fixed in commit 0487a55.
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Thanks Nick.
I hope that I'm wrong but I think that your SPIEN bit is wrong! It's 0x20, not 0x40. Read your own def in fuse calc sketch or fuse page.