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where ((nvfuser_index_t)blockIdx.x) < ((ceilDiv(T1.size[1], 128)) * 4) is trivial because the rhs of < is identical to gridDim.x. We should simplify this trivial predicate.
On RTX 3090, the perf with and without that trivial predicate is 20.8374 ms vs 16.1956 ms
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This PR is stacked on #105, it fixes#95.
There are mainly two changes effective:
- In `lower_scalar_hoist.cpp`, add assumptions about parallel indices
- In `predicate_compute.cpp`, check if extent is the same as parallel
dimension
Only one of the above changes is sufficient to fix the bug, but I did
both to be double safe.
cc: @mmigdal-nv@drzejan2
For the example in
FusionAmpereSwizzle_CUDA
, the generated code contains trivial predicates:where
((nvfuser_index_t)blockIdx.x) < ((ceilDiv(T1.size[1], 128)) * 4)
is trivial because the rhs of<
is identical togridDim.x
. We should simplify this trivial predicate.On RTX 3090, the perf with and without that trivial predicate is
20.8374 ms
vs16.1956 ms
Tasks
ParallelDimensionMap
with expr simplifier #86i1 * i2 >= i1
ifi2 >= 1 && i1 >= 0
#94computeLaunchParams
and warp-pad handling #98The text was updated successfully, but these errors were encountered: