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imx8qm-mek.dts
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imx8qm-mek.dts
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018-2019 NXP
* Dong Aisheng <aisheng.dong@nxp.com>
*/
/dts-v1/;
#include <dt-bindings/usb/pd.h>
#include "imx8qm.dtsi"
/ {
model = "Freescale i.MX8QM MEK";
compatible = "fsl,imx8qm-mek", "fsl,imx8qm";
chosen {
stdout-path = &lpuart0;
};
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
};
lvds_backlight0: lvds_backlight@0 {
compatible = "pwm-backlight";
pwms = <&pwm_lvds0 0 100000 0>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <80>;
};
lvds_backlight1: lvds_backlight@1 {
compatible = "pwm-backlight";
pwms = <&pwm_lvds1 0 100000 0>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <80>;
};
modem_reset: modem-reset {
compatible = "gpio-reset";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_modem_reset>;
pinctrl-1 = <&pinctrl_modem_reset_sleep>;
reset-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
reset-delay-us = <2000>;
reset-post-delay-ms = <40>;
#reset-cells = <0>;
};
cbtl04gp {
compatible = "nxp,cbtl04gp";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_typec_mux>;
switch-gpios = <&lsio_gpio4 6 GPIO_ACTIVE_LOW>;
reset-gpios = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
orientation-switch;
port {
usb3_data_ss: endpoint {
remote-endpoint = <&typec_con_ss>;
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpu_reserved: gpu_reserved@8800000000 {
no-map;
reg = <0x8 0x80000000 0 0x10000000>;
};
decoder_boot: decoder_boot@84000000 {
no-map;
reg = <0 0x84000000 0 0x2000000>;
};
encoder1_boot: encoder1_boot@86000000 {
no-map;
reg = <0 0x86000000 0 0x200000>;
};
encoder2_boot: encoder2_boot@86200000 {
no-map;
reg = <0 0x86200000 0 0x200000>;
};
decoder_rpc: decoder_rpc@92000000 {
no-map;
reg = <0 0x92000000 0 0x100000>;
};
dsp_reserved: dsp@92400000 {
reg = <0 0x92400000 0 0x1000000>;
no-map;
};
dsp_reserved_heap: dsp_reserved_heap {
reg = <0 0x93400000 0 0xef0000>;
no-map;
};
dsp_vdev0vring0: vdev0vring0@942f0000 {
reg = <0 0x942f0000 0 0x8000>;
no-map;
};
dsp_vdev0vring1: vdev0vring1@942f8000 {
reg = <0 0x942f8000 0 0x8000>;
no-map;
};
dsp_vdev0buffer: vdev0buffer@94300000 {
compatible = "shared-dma-pool";
reg = <0 0x94300000 0 0x100000>;
no-map;
};
encoder1_rpc: encoder1_rpc@94400000 {
no-map;
reg = <0 0x94400000 0 0x700000>;
};
encoder2_rpc: encoder1_rpc@94b00000 {
no-map;
reg = <0 0x94b00000 0 0x700000>;
};
/* global autoconfigured region for contiguous allocations */
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x3c000000>;
alloc-ranges = <0 0xc0000000 0 0x3c000000>;
linux,cma-default;
};
};
reg_fec2_supply: fec2_nvcc {
compatible = "regulator-fixed";
regulator-name = "fec2_nvcc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&max7322 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_pciea: regulator-pcie {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pciea_reg>;
regulator-name = "mpcie_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&lsio_gpio1 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_usb_otg1_vbus: regulator-usbotg1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&lsio_gpio4 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usdhc2_vmmc: usdhc2-vmmc {
compatible = "regulator-fixed";
regulator-name = "SD1_SPWR";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>;
off-on-delay-us = <4800>;
enable-active-high;
};
reg_can01_en: regulator-can01-gen {
compatible = "regulator-fixed";
regulator-name = "can01-en";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_can2_en: regulator-can2-gen {
compatible = "regulator-fixed";
regulator-name = "can2-en";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6416 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_can01_stby: regulator-can01-stby {
compatible = "regulator-fixed";
regulator-name = "can01-stby";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <®_can01_en>;
};
reg_can2_stby: regulator-can2-stby {
compatible = "regulator-fixed";
regulator-name = "can2-stby";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6416 6 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <®_can2_en>;
};
reg_vref_1v8: regulator-adc-vref {
compatible = "regulator-fixed";
regulator-name = "vref_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_audio: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "cs42888_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
bt_sco_codec: bt_sco_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
};
sound-bt-sco {
compatible = "simple-audio-card";
simple-audio-card,name = "bt-sco-audio";
simple-audio-card,format = "dsp_a";
simple-audio-card,bitclock-inversion;
simple-audio-card,frame-master = <&btcpu>;
simple-audio-card,bitclock-master = <&btcpu>;
btcpu: simple-audio-card,cpu {
sound-dai = <&sai0>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
simple-audio-card,codec {
sound-dai = <&bt_sco_codec 1>;
};
};
sound-cs42888 {
compatible = "fsl,imx8qm-mek-cs42888",
"fsl,imx-audio-cs42888";
model = "imx-cs42888";
audio-cpu = <&esai0>;
audio-codec = <&cs42888>;
audio-asrc = <&asrc0>;
audio-routing =
"Line Out Jack", "AOUT1L",
"Line Out Jack", "AOUT1R",
"Line Out Jack", "AOUT2L",
"Line Out Jack", "AOUT2R",
"Line Out Jack", "AOUT3L",
"Line Out Jack", "AOUT3R",
"Line Out Jack", "AOUT4L",
"Line Out Jack", "AOUT4R",
"AIN1L", "Line In Jack",
"AIN1R", "Line In Jack",
"AIN2L", "Line In Jack",
"AIN2R", "Line In Jack";
status = "okay";
};
sound-wm8960 {
compatible = "fsl,imx8qm-mek-wm8960",
"fsl,imx-audio-wm8960";
model = "wm8960-audio";
audio-cpu = <&sai1>;
audio-codec = <&wm8960>;
hp-det-gpio = <&lsio_gpio0 31 GPIO_ACTIVE_HIGH>;
audio-routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Ext Spk", "SPK_LP",
"Ext Spk", "SPK_LN",
"Ext Spk", "SPK_RP",
"Ext Spk", "SPK_RN",
"LINPUT1", "Mic Jack",
"Mic Jack", "MICB";
};
cm4 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "simple-bus";
imx8qm_cm40: imx8qm_cm4@0 {
compatible = "fsl,imx8qm-cm4";
rsc-da = <0x90000000>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <&lsio_mu5 0 1
&lsio_mu5 1 1
&lsio_mu5 3 1>;
memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
<&vdev1vring0>, <&vdev1vring1>, <&rsc_table0>;
fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
fsl,entry-address = <0x34fe0000>;
status = "okay";
power-domains = <&pd IMX_SC_R_M4_0_PID0>,
<&pd IMX_SC_R_M4_0_MU_1A>;
};
imx8qm_cm41: imx8x_cm4@1 {
compatible = "fsl,imx8qm-cm4";
rsc-da = <0x90100000>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <&lsio_mu6 0 1
&lsio_mu6 1 1
&lsio_mu6 3 1>;
memory-region = <&vdevbuffer>, <&vdev2vring0>, <&vdev2vring1>,
<&vdev3vring0>, <&vdev3vring1>, <&rsc_table1>;
fsl,resource-id = <IMX_SC_R_M4_1_PID0>;
fsl,entry-address = <0x38fe0000>;
status = "okay";
power-domains = <&pd IMX_SC_R_M4_1_PID0>,
<&pd IMX_SC_R_M4_1_MU_1A>;
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
vdev0vring0: vdev0vring0@90000000 {
reg = <0 0x90000000 0 0x8000>;
no-map;
};
vdev0vring1: vdev0vring1@90008000 {
reg = <0 0x90008000 0 0x8000>;
no-map;
};
vdev1vring0: vdev1vring0@90010000 {
reg = <0 0x90010000 0 0x8000>;
no-map;
};
vdev1vring1: vdev1vring1@90018000 {
reg = <0 0x90018000 0 0x8000>;
no-map;
};
rsc_table0: rsc-table@900ff000 {
reg = <0 0x900ff000 0 0x1000>;
no-map;
};
vdevbuffer: vdevbuffer {
compatible = "shared-dma-pool";
reg = <0 0x90400000 0 0x100000>;
no-map;
};
vdev2vring0: vdev0vring0@90100000 {
reg = <0 0x90100000 0 0x8000>;
no-map;
};
vdev2vring1: vdev0vring1@90108000 {
reg = <0 0x90108000 0 0x8000>;
no-map;
};
vdev3vring0: vdev1vring0@90110000 {
reg = <0 0x90110000 0 0x8000>;
no-map;
};
vdev3vring1: vdev1vring1@90118000 {
reg = <0 0x90118000 0 0x8000>;
no-map;
};
rsc_table1: rsc-table@901ff000 {
reg = <0 0x901ff000 0 0x1000>;
no-map;
};
};
/*
* this dummy i2c mux.
* gpio actually will not impact selection.
* at actual boards, only 1 devices connectted.
* I2C client driver will check ID when probe.
* Only matched ID's driver probe successfully.
*/
i2cvmux: i2cmux {
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
mux-gpios = <&lsio_gpio5 1 GPIO_ACTIVE_HIGH>; /* use an unused gpio */
i2c-parent = <&i2c0>;
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
fxos8700@1e {
compatible = "nxp,fxos8700";
reg = <0x1e>;
interrupt-open-drain;
};
};
i2c@0 { /* Rev D */
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
lsm303arg@1e {
compatible = "st,lsm303agr-magn";
reg = <0x1e>;
st,drdy-int-pin = <1>;
interrupt-parent = <&lsio_gpio4>;
interrupt-open-drain;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
};
};
};
&lsio_mu5 {
status = "okay";
};
&lsio_mu6 {
status = "okay";
};
&adc0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0>;
vref-supply = <®_vref_1v8>;
status = "okay";
};
&cm41_i2c {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cm41_i2c>;
status = "okay";
pca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
cs42888: cs42888@48 {
compatible = "cirrus,cs42888";
reg = <0x48>;
clocks = <&mclkout0_lpcg 0>;
clock-names = "mclk";
VA-supply = <®_audio>;
VD-supply = <®_audio>;
VLS-supply = <®_audio>;
VLC-supply = <®_audio>;
reset-gpio = <&lsio_gpio4 25 GPIO_ACTIVE_LOW>;
assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&mclkout0_lpcg 0>;
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
fsl,txs-rxm;
status = "okay";
};
};
&cm41_intmux {
status = "okay";
};
&dc0_pc {
status = "okay";
};
&dc0_prg1 {
status = "okay";
};
&dc0_prg2 {
status = "okay";
};
&dc0_prg3 {
status = "okay";
};
&dc0_prg4 {
status = "okay";
};
&dc0_prg5 {
status = "okay";
};
&dc0_prg6 {
status = "okay";
};
&dc0_prg7 {
status = "okay";
};
&dc0_prg8 {
status = "okay";
};
&dc0_prg9 {
status = "okay";
};
&dc0_dpr1_channel1 {
status = "okay";
};
&dc0_dpr1_channel2 {
status = "okay";
};
&dc0_dpr1_channel3 {
status = "okay";
};
&dc0_dpr2_channel1 {
status = "okay";
};
&dc0_dpr2_channel2 {
status = "okay";
};
&dc0_dpr2_channel3 {
status = "okay";
};
&dpu1 {
status = "okay";
};
&dsp {
compatible = "fsl,imx8qm-hifi4";
memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
<&dsp_vdev0vring1>, <&dsp_reserved>;
status = "okay";
};
&asrc0 {
fsl,asrc-rate = <48000>;
status = "okay";
};
&amix {
status = "okay";
};
&esai0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esai0>;
assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&esai0_lpcg 0>;
assigned-clock-parents = <&aud_pll_div0_lpcg 0>;
assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
fsl,txm-rxs;
status = "okay";
};
&sai0 {
#sound-dai-cells = <0>;
assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&sai0_lpcg 0>;
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai0>;
status = "okay";
};
&sai1 {
assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&sai1_lpcg 0>; /* FIXME: should be sai1, original code is 0 */
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
status = "okay";
};
&sai6 {
assigned-clocks = <&acm IMX_ADMA_ACM_SAI6_MCLK_SEL>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>,
<&sai6_lpcg 0>;
assigned-clock-parents = <&aud_pll_div1_lpcg 0>;
assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
fsl,sai-asynchronous;
fsl,txm-rxs;
status = "okay";
};
&sai7 {
assigned-clocks = <&acm IMX_ADMA_ACM_SAI7_MCLK_SEL>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>,
<&sai7_lpcg 0>;
assigned-clock-parents = <&aud_pll_div1_lpcg 0>;
assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>;
fsl,sai-asynchronous;
fsl,txm-rxs;
status = "okay";
};
&pwm_lvds0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_lvds0>;
status = "okay";
};
&i2c1_lvds0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds0_lpi2c1>;
clock-frequency = <100000>;
status = "okay";
lvds-to-hdmi-bridge@4c {
compatible = "ite,it6263";
reg = <0x4c>;
port {
it6263_0_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb1_phy {
status = "okay";
};
&ldb1 {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
status = "okay";
port@1 {
reg = <1>;
lvds0_out: endpoint {
remote-endpoint = <&it6263_0_in>;
};
};
};
};
&i2c0_mipi0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mipi0_lpi2c0>;
clock-frequency = <100000>;
status = "okay";
adv_bridge0: adv7535@3d {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,adv7535";
reg = <0x3d>;
adi,addr-cec = <0x3b>;
adi,dsi-lanes = <4>;
adi,dsi-channel = <1>;
interrupt-parent = <&lsio_gpio1>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
status = "okay";
port@0 {
reg = <0>;
adv7535_0_in: endpoint {
remote-endpoint = <&mipi0_adv_out>;
};
};
};
};
&mipi0_dphy {
status = "okay";
};
&mipi0_dsi_host {
status = "okay";
ports {
port@1 {
reg = <1>;
mipi0_adv_out: endpoint {
remote-endpoint = <&adv7535_0_in>;
};
};
};
};
&i2c0_mipi1 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mipi1_lpi2c0>;
clock-frequency = <100000>;
status = "okay";
adv_bridge1: adv7535@3d {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,adv7535";
reg = <0x3d>;
adi,addr-cec = <0x3b>;
adi,dsi-lanes = <4>;
adi,dsi-channel = <1>;
interrupt-parent = <&lsio_gpio1>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
status = "okay";
port@0 {
reg = <0>;
adv7535_1_in: endpoint {
remote-endpoint = <&mipi1_adv_out>;
};
};
};
};
&mipi1_dphy {
status = "okay";
};
&mipi1_dsi_host {
status = "okay";
ports {
port@1 {
reg = <1>;
mipi1_adv_out: endpoint {
remote-endpoint = <&adv7535_1_in>;
};
};
};
};
&dc1_pc {
status = "okay";
};
&dc1_prg1 {
status = "okay";
};
&dc1_prg2 {
status = "okay";
};
&dc1_prg3 {
status = "okay";
};
&dc1_prg4 {
status = "okay";
};
&dc1_prg5 {
status = "okay";
};
&dc1_prg6 {
status = "okay";
};
&dc1_prg7 {
status = "okay";
};
&dc1_prg8 {
status = "okay";
};
&dc1_prg9 {
status = "okay";
};
&dc1_dpr1_channel1 {
status = "okay";
};
&dc1_dpr1_channel2 {
status = "okay";
};
&dc1_dpr1_channel3 {
status = "okay";
};
&dc1_dpr2_channel1 {
status = "okay";
};
&dc1_dpr2_channel2 {
status = "okay";
};
&dc1_dpr2_channel3 {
status = "okay";
};
&dpu2 {
status = "okay";
};
&pwm_lvds1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_lvds1>;
status = "okay";
};
&i2c1_lvds1 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds1_lpi2c1>;
clock-frequency = <100000>;
status = "okay";
lvds-to-hdmi-bridge@4c {
compatible = "ite,it6263";
reg = <0x4c>;
port {
it6263_1_in: endpoint {
remote-endpoint = <&lvds1_out>;
};
};
};
};
&ldb2_phy {
status = "okay";
};
&ldb2 {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
status = "okay";
port@1 {
reg = <1>;
lvds1_out: endpoint {
remote-endpoint = <&it6263_1_in>;
};
};
};
};
&lpspi2 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi2 &pinctrl_lpspi2_cs>;
cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;
status = "okay";
spidev0: spi@0 {
reg = <0>;
compatible = "rohm,dh2228fv";
spi-max-frequency = <30000000>;
};
};
&emvsim0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sim0>;
status = "okay";
};
&lpuart0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart0>;
status = "okay";
};
&lpuart1 { /* BT */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart1>;
resets = <&modem_reset>;
status = "okay";
bluetooth {
compatible = "nxp,88w8987-bt";
};
};
&lpuart2 { /* Dbg console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart2>;
status = "disabled";
};
&lpuart3 { /* MKbus */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart3>;
status = "disabled";
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <®_can01_stby>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <®_can01_stby>;
status = "okay";
};
&flexcan3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan3>;
xceiver-supply = <®_can2_stby>;
status = "okay";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
phy-mode = "rgmii-txid";
phy-handle = <ðphy0>;
fsl,magic-packet;
nvmem-cells = <&fec_mac0>;
nvmem-cell-names = "mac-address";
rx-internal-delay-ps = <2000>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;