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imx7.cfg
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imx7.cfg
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# Freescale i.MX7 series dual/quad core processor
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx7
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x5ba00477
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
#
# Cortex-A7 target
#
# GDB target: Cortex-A7, using DAP, configuring only one core
# Base addresses of cores:
# core 0 - 0x80070000
# core 1 - 0x80072000
set _TARGETNAME $_CHIPNAME.cpu_a7.0
target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x80070000
#
# Cortex-M3 target
#
set _TARGETNAME_2 $_CHIPNAME.cpu_m4
target create $_TARGETNAME_2 cortex_m -chain-position $_CHIPNAME.dap -ap-num 4
# some TCK cycles are required to activate the DEBUG power domain
#jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
proc imx7_dbginit {target} {
# General Cortex A7 debug initialisation
cortex_a dbginit
}
# Slow speed to be sure it will work
adapter_khz 1000
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
$_TARGETNAME configure -event reset-assert-post "imx7_dbginit $_TARGETNAME"
$_TARGETNAME configure -event gdb-attach { halt }