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48amd64-4d2n6c-sparse.output
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48amd64-4d2n6c-sparse.output
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Machine (P#0 total=100661148KB DMIProductName=DRACHMA DMIProductVersion="Rev 2" DMIProductSerial=0123456789 DMIProductUUID=008844D0-2214-DF11-B89F-F50F715B14E8 DMIBoardVendor=AMD DMIBoardName=DRACHMA DMIBoardVersion="Rev 2" DMIBoardSerial=0123456789 DMIBoardAssetTag= DMIChassisVendor=AMD DMIChassisType=23 DMIChassisVersion= DMIChassisSerial= DMIChassisAssetTag= DMIBIOSVendor="Phoenix Technologies Ltd." DMIBIOSVersion=PDPAX1-6 DMIBIOSDate=12/15/2009 DMISysVendor=AMD Backend=Linux)
Package L#0 (P#0 total=25163676KB CPUModel="AMD Engineering Sample")
L3Cache L#0 (total=8386460KB size=5118KB linesize=64 ways=48)
NUMANode L#0 (P#0 local=8386460KB total=8386460KB)
L2Cache L#0 (size=512KB linesize=64 ways=16)
L1dCache L#0 (size=64KB linesize=64 ways=2)
L1iCache L#0 (size=64KB linesize=64 ways=2)
Core L#0 (P#0)
PU L#0 (P#0)
L2Cache L#1 (size=512KB linesize=64 ways=16)
L1dCache L#1 (size=64KB linesize=64 ways=2)
L1iCache L#1 (size=64KB linesize=64 ways=2)
Core L#1 (P#1)
PU L#1 (P#1)
L2Cache L#2 (size=512KB linesize=64 ways=16)
L1dCache L#2 (size=64KB linesize=64 ways=2)
L1iCache L#2 (size=64KB linesize=64 ways=2)
Core L#2 (P#2)
PU L#2 (P#2)
L2Cache L#3 (size=512KB linesize=64 ways=16)
L1dCache L#3 (size=64KB linesize=64 ways=2)
L1iCache L#3 (size=64KB linesize=64 ways=2)
Core L#3 (P#3)
PU L#3 (P#3)
L2Cache L#4 (size=512KB linesize=64 ways=16)
L1dCache L#4 (size=64KB linesize=64 ways=2)
L1iCache L#4 (size=64KB linesize=64 ways=2)
Core L#4 (P#4)
PU L#4 (P#4)
L2Cache L#5 (size=512KB linesize=64 ways=16)
L1dCache L#5 (size=64KB linesize=64 ways=2)
L1iCache L#5 (size=64KB linesize=64 ways=2)
Core L#5 (P#5)
PU L#5 (P#5)
L3Cache L#1 (total=16777216KB size=5118KB linesize=64 ways=48)
NUMANode L#1 (P#1 local=16777216KB total=16777216KB)
L2Cache L#6 (size=512KB linesize=64 ways=16)
L1dCache L#6 (size=64KB linesize=64 ways=2)
L1iCache L#6 (size=64KB linesize=64 ways=2)
Core L#6 (P#0)
PU L#6 (P#6)
L2Cache L#7 (size=512KB linesize=64 ways=16)
L1dCache L#7 (size=64KB linesize=64 ways=2)
L1iCache L#7 (size=64KB linesize=64 ways=2)
Core L#7 (P#1)
PU L#7 (P#7)
L2Cache L#8 (size=512KB linesize=64 ways=16)
L1dCache L#8 (size=64KB linesize=64 ways=2)
L1iCache L#8 (size=64KB linesize=64 ways=2)
Core L#8 (P#2)
PU L#8 (P#8)
L2Cache L#9 (size=512KB linesize=64 ways=16)
L1dCache L#9 (size=64KB linesize=64 ways=2)
L1iCache L#9 (size=64KB linesize=64 ways=2)
Core L#9 (P#3)
PU L#9 (P#9)
L2Cache L#10 (size=512KB linesize=64 ways=16)
L1dCache L#10 (size=64KB linesize=64 ways=2)
L1iCache L#10 (size=64KB linesize=64 ways=2)
Core L#10 (P#4)
PU L#10 (P#10)
L2Cache L#11 (size=512KB linesize=64 ways=16)
L1dCache L#11 (size=64KB linesize=64 ways=2)
L1iCache L#11 (size=64KB linesize=64 ways=2)
Core L#11 (P#5)
PU L#11 (P#11)
Package L#1 (P#1 total=25165824KB CPUModel="AMD Engineering Sample")
L3Cache L#2 (total=8388608KB size=5118KB linesize=64 ways=48)
NUMANode L#2 (P#2 local=8388608KB total=8388608KB)
L2Cache L#12 (size=512KB linesize=64 ways=16)
L1dCache L#12 (size=64KB linesize=64 ways=2)
L1iCache L#12 (size=64KB linesize=64 ways=2)
Core L#12 (P#0)
PU L#12 (P#12)
L2Cache L#13 (size=512KB linesize=64 ways=16)
L1dCache L#13 (size=64KB linesize=64 ways=2)
L1iCache L#13 (size=64KB linesize=64 ways=2)
Core L#13 (P#1)
PU L#13 (P#13)
L2Cache L#14 (size=512KB linesize=64 ways=16)
L1dCache L#14 (size=64KB linesize=64 ways=2)
L1iCache L#14 (size=64KB linesize=64 ways=2)
Core L#14 (P#2)
PU L#14 (P#14)
L2Cache L#15 (size=512KB linesize=64 ways=16)
L1dCache L#15 (size=64KB linesize=64 ways=2)
L1iCache L#15 (size=64KB linesize=64 ways=2)
Core L#15 (P#3)
PU L#15 (P#15)
L2Cache L#16 (size=512KB linesize=64 ways=16)
L1dCache L#16 (size=64KB linesize=64 ways=2)
L1iCache L#16 (size=64KB linesize=64 ways=2)
Core L#16 (P#4)
PU L#16 (P#16)
L2Cache L#17 (size=512KB linesize=64 ways=16)
L1dCache L#17 (size=64KB linesize=64 ways=2)
L1iCache L#17 (size=64KB linesize=64 ways=2)
Core L#17 (P#5)
PU L#17 (P#17)
L3Cache L#3 (total=16777216KB size=5118KB linesize=64 ways=48)
NUMANode L#3 (P#33 local=16777216KB total=16777216KB)
L2Cache L#18 (size=512KB linesize=64 ways=16)
L1dCache L#18 (size=64KB linesize=64 ways=2)
L1iCache L#18 (size=64KB linesize=64 ways=2)
Core L#18 (P#0)
PU L#18 (P#18)
L2Cache L#19 (size=512KB linesize=64 ways=16)
L1dCache L#19 (size=64KB linesize=64 ways=2)
L1iCache L#19 (size=64KB linesize=64 ways=2)
Core L#19 (P#1)
PU L#19 (P#19)
L2Cache L#20 (size=512KB linesize=64 ways=16)
L1dCache L#20 (size=64KB linesize=64 ways=2)
L1iCache L#20 (size=64KB linesize=64 ways=2)
Core L#20 (P#2)
PU L#20 (P#20)
L2Cache L#21 (size=512KB linesize=64 ways=16)
L1dCache L#21 (size=64KB linesize=64 ways=2)
L1iCache L#21 (size=64KB linesize=64 ways=2)
Core L#21 (P#3)
PU L#21 (P#21)
L2Cache L#22 (size=512KB linesize=64 ways=16)
L1dCache L#22 (size=64KB linesize=64 ways=2)
L1iCache L#22 (size=64KB linesize=64 ways=2)
Core L#22 (P#4)
PU L#22 (P#22)
L2Cache L#23 (size=512KB linesize=64 ways=16)
L1dCache L#23 (size=64KB linesize=64 ways=2)
L1iCache L#23 (size=64KB linesize=64 ways=2)
Core L#23 (P#5)
PU L#23 (P#23)
Package L#2 (P#2 total=25165824KB CPUModel="AMD Engineering Sample")
L3Cache L#4 (total=8388608KB size=5118KB linesize=64 ways=48)
NUMANode L#4 (P#34 local=8388608KB total=8388608KB)
L2Cache L#24 (size=512KB linesize=64 ways=16)
L1dCache L#24 (size=64KB linesize=64 ways=2)
L1iCache L#24 (size=64KB linesize=64 ways=2)
Core L#24 (P#0)
PU L#24 (P#24)
L2Cache L#25 (size=512KB linesize=64 ways=16)
L1dCache L#25 (size=64KB linesize=64 ways=2)
L1iCache L#25 (size=64KB linesize=64 ways=2)
Core L#25 (P#1)
PU L#25 (P#25)
L2Cache L#26 (size=512KB linesize=64 ways=16)
L1dCache L#26 (size=64KB linesize=64 ways=2)
L1iCache L#26 (size=64KB linesize=64 ways=2)
Core L#26 (P#2)
PU L#26 (P#26)
L2Cache L#27 (size=512KB linesize=64 ways=16)
L1dCache L#27 (size=64KB linesize=64 ways=2)
L1iCache L#27 (size=64KB linesize=64 ways=2)
Core L#27 (P#3)
PU L#27 (P#27)
L2Cache L#28 (size=512KB linesize=64 ways=16)
L1dCache L#28 (size=64KB linesize=64 ways=2)
L1iCache L#28 (size=64KB linesize=64 ways=2)
Core L#28 (P#4)
PU L#28 (P#28)
L2Cache L#29 (size=512KB linesize=64 ways=16)
L1dCache L#29 (size=64KB linesize=64 ways=2)
L1iCache L#29 (size=64KB linesize=64 ways=2)
Core L#29 (P#5)
PU L#29 (P#29)
L3Cache L#5 (total=16777216KB size=5118KB linesize=64 ways=48)
NUMANode L#5 (P#45 local=16777216KB total=16777216KB)
L2Cache L#30 (size=512KB linesize=64 ways=16)
L1dCache L#30 (size=64KB linesize=64 ways=2)
L1iCache L#30 (size=64KB linesize=64 ways=2)
Core L#30 (P#0)
PU L#30 (P#30)
L2Cache L#31 (size=512KB linesize=64 ways=16)
L1dCache L#31 (size=64KB linesize=64 ways=2)
L1iCache L#31 (size=64KB linesize=64 ways=2)
Core L#31 (P#1)
PU L#31 (P#31)
L2Cache L#32 (size=512KB linesize=64 ways=16)
L1dCache L#32 (size=64KB linesize=64 ways=2)
L1iCache L#32 (size=64KB linesize=64 ways=2)
Core L#32 (P#2)
PU L#32 (P#32)
L2Cache L#33 (size=512KB linesize=64 ways=16)
L1dCache L#33 (size=64KB linesize=64 ways=2)
L1iCache L#33 (size=64KB linesize=64 ways=2)
Core L#33 (P#3)
PU L#33 (P#33)
L2Cache L#34 (size=512KB linesize=64 ways=16)
L1dCache L#34 (size=64KB linesize=64 ways=2)
L1iCache L#34 (size=64KB linesize=64 ways=2)
Core L#34 (P#4)
PU L#34 (P#34)
L2Cache L#35 (size=512KB linesize=64 ways=16)
L1dCache L#35 (size=64KB linesize=64 ways=2)
L1iCache L#35 (size=64KB linesize=64 ways=2)
Core L#35 (P#5)
PU L#35 (P#35)
Package L#3 (P#3 total=25165824KB CPUModel="AMD Engineering Sample")
L3Cache L#6 (total=8388608KB size=5118KB linesize=64 ways=48)
NUMANode L#6 (P#72 local=8388608KB total=8388608KB)
L2Cache L#36 (size=512KB linesize=64 ways=16)
L1dCache L#36 (size=64KB linesize=64 ways=2)
L1iCache L#36 (size=64KB linesize=64 ways=2)
Core L#36 (P#0)
PU L#36 (P#36)
L2Cache L#37 (size=512KB linesize=64 ways=16)
L1dCache L#37 (size=64KB linesize=64 ways=2)
L1iCache L#37 (size=64KB linesize=64 ways=2)
Core L#37 (P#1)
PU L#37 (P#37)
L2Cache L#38 (size=512KB linesize=64 ways=16)
L1dCache L#38 (size=64KB linesize=64 ways=2)
L1iCache L#38 (size=64KB linesize=64 ways=2)
Core L#38 (P#2)
PU L#38 (P#38)
L2Cache L#39 (size=512KB linesize=64 ways=16)
L1dCache L#39 (size=64KB linesize=64 ways=2)
L1iCache L#39 (size=64KB linesize=64 ways=2)
Core L#39 (P#3)
PU L#39 (P#39)
L2Cache L#40 (size=512KB linesize=64 ways=16)
L1dCache L#40 (size=64KB linesize=64 ways=2)
L1iCache L#40 (size=64KB linesize=64 ways=2)
Core L#40 (P#4)
PU L#40 (P#40)
L2Cache L#41 (size=512KB linesize=64 ways=16)
L1dCache L#41 (size=64KB linesize=64 ways=2)
L1iCache L#41 (size=64KB linesize=64 ways=2)
Core L#41 (P#5)
PU L#41 (P#41)
L3Cache L#7 (total=16777216KB size=5118KB linesize=64 ways=48)
NUMANode L#7 (P#73 local=16777216KB total=16777216KB)
L2Cache L#42 (size=512KB linesize=64 ways=16)
L1dCache L#42 (size=64KB linesize=64 ways=2)
L1iCache L#42 (size=64KB linesize=64 ways=2)
Core L#42 (P#0)
PU L#42 (P#42)
L2Cache L#43 (size=512KB linesize=64 ways=16)
L1dCache L#43 (size=64KB linesize=64 ways=2)
L1iCache L#43 (size=64KB linesize=64 ways=2)
Core L#43 (P#1)
PU L#43 (P#43)
L2Cache L#44 (size=512KB linesize=64 ways=16)
L1dCache L#44 (size=64KB linesize=64 ways=2)
L1iCache L#44 (size=64KB linesize=64 ways=2)
Core L#44 (P#2)
PU L#44 (P#44)
L2Cache L#45 (size=512KB linesize=64 ways=16)
L1dCache L#45 (size=64KB linesize=64 ways=2)
L1iCache L#45 (size=64KB linesize=64 ways=2)
Core L#45 (P#3)
PU L#45 (P#45)
L2Cache L#46 (size=512KB linesize=64 ways=16)
L1dCache L#46 (size=64KB linesize=64 ways=2)
L1iCache L#46 (size=64KB linesize=64 ways=2)
Core L#46 (P#4)
PU L#46 (P#46)
L2Cache L#47 (size=512KB linesize=64 ways=16)
L1dCache L#47 (size=64KB linesize=64 ways=2)
L1iCache L#47 (size=64KB linesize=64 ways=2)
Core L#47 (P#5)
PU L#47 (P#47)
depth 0: 1 Machine (type #0)
depth 1: 4 Package (type #1)
depth 2: 8 L3Cache (type #6)
depth 3: 48 L2Cache (type #5)
depth 4: 48 L1dCache (type #4)
depth 5: 48 L1iCache (type #9)
depth 6: 48 Core (type #2)
depth 7: 48 PU (type #3)
Special depth -3: 8 NUMANode (type #13)
Relative latency matrix (name NUMALatency kind 5) between 8 NUMANodes (depth -3) by logical indexes:
index 0 1 2 3 4 5 6 7
0 10 16 16 22 16 22 16 22
1 16 10 22 16 16 22 22 16
2 16 22 10 16 16 16 16 16
3 22 16 16 10 16 16 22 22
4 16 16 16 16 10 16 16 22
5 22 22 16 16 16 10 22 16
6 16 22 16 22 16 22 10 16
7 22 16 16 22 22 16 16 10
CPU kind #0 efficiency -1 cpuset 0x0000ffff,0xffffffff
FrequencyMaxMHz = 1700
Topology not from this system