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STOP: clear PCBMUX disable from STOP Exit instead of SGPE INIT
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Change-Id: Ia3cf92e7e5525f5fbcda8a1c47b5a631b3f57bd6
Original-Change-Id: Ice9d549cd5e752898a22dc823e39d5062206d0c2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38560
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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@davidduyue @op-jenkins
davidduyue authored and op-jenkins committed Aug 22, 2018
1 parent 53f1e74 commit 14430f5
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Showing 3 changed files with 48 additions and 51 deletions.
60 changes: 26 additions & 34 deletions import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,10 @@

extern CmeStopRecord G_cme_stop_record;


#if HW402407_NDD1_TLBIE_STOP_WORKAROUND


void prepare_for_ramming (uint32_t core)
{
uint64_t scom_data;
Expand Down Expand Up @@ -122,7 +126,6 @@ uint16_t ram_read_lpid( uint32_t core, uint32_t thread )
return ((uint16_t) scom_data);
}


void ram_write_lpid( uint32_t core, uint32_t thread, uint16_t lpid )
{

Expand Down Expand Up @@ -190,40 +193,9 @@ void turn_off_ram_mode (uint32_t core)

}


void p9_cme_acquire_pcbmux(uint32_t core, uint32_t check)
{

PK_TRACE("Request PCB mux via SICR[10/11]");

#ifdef HW405292_NDD1_PCBMUX_SAVIOR
p9_cme_pcbmux_savior_prologue(core);
#endif
out32(CME_LCL_SICR_OR, core << SHIFT32(11));

// Poll Infinitely for PCB Mux Grant
// MF: change watchdog timer in pk to ensure forward progress
while((core & (in32(CME_LCL_SISR) >> SHIFT32(11))) != core);

if (check != 0)
{
#ifdef HW405292_NDD1_PCBMUX_SAVIOR
p9_cme_pcbmux_savior_epilogue(core);
#endif
}

PK_TRACE("S: PCB Mux Granted C[%d]", core);

}

void p9_cme_release_pcbmux(uint32_t core)
{

out32(CME_LCL_SICR_CLR, core << SHIFT32(11));

while((core & ~(in32(CME_LCL_SISR) >> SHIFT32(11))) != core);

}

#ifdef HW405292_NDD1_PCBMUX_SAVIOR

Expand Down Expand Up @@ -413,7 +385,7 @@ p9_cme_stop_entry()
{
PK_TRACE_DBG("Check: core[%d] core_stop1[%d]", core, core_stop1);

#if HW386841_DD1_DSL_STOP1_FIX
#if HW386841_NDD1_DSL_STOP1_FIX

//----------------------------------------------------------------------
PK_TRACE("+++++ +++++ STOP LEVEL 1 ENTRY +++++ +++++");
Expand Down Expand Up @@ -450,7 +422,27 @@ p9_cme_stop_entry()
PK_TRACE("+++++ +++++ STOP LEVEL 2 ENTRY +++++ +++++");
//----------------------------------------------------------------------

p9_cme_acquire_pcbmux(core, 1);
#ifdef HW405292_NDD1_PCBMUX_SAVIOR
p9_cme_pcbmux_savior_prologue(core);
#endif

PK_TRACE("Request PCB mux via SICR[10/11]");
out32(CME_LCL_SICR_OR, core << SHIFT32(11));

// Poll Infinitely for PCB Mux Grant
// MF: change watchdog timer in pk to ensure forward progress
while((core & (in32(CME_LCL_SISR) >> SHIFT32(11))) != core);

PK_TRACE("PCB Mux Granted on Core[%d]", core);

#ifdef HW405292_NDD1_PCBMUX_SAVIOR

if (1)
{
p9_cme_pcbmux_savior_epilogue(core);
}

#endif

PK_TRACE("Pulse STOP entry acknowledgement to PC via SICR[0/1]");
out32(CME_LCL_SICR_OR, core << SHIFT32(1));
Expand Down
12 changes: 2 additions & 10 deletions import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h
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Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ extern "C" {
#include "p9_pm_hcd_flags.h"
#include "p9_stop_common.h"

#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX || FUSED_CORE_MODE_SCAN_FIX
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX || NDD1_FUSED_CORE_MODE_SCAN_FIX
#define EXTRACT_RING_BITS(mask, ring, save) save = (ring) & (mask);
#define RESTORE_RING_BITS(mask, ring, save) ring = (((ring) & (~mask)) | (save));
#endif
Expand Down Expand Up @@ -202,12 +202,6 @@ enum SGPE_STOP_EVENT_LEVELS
LEVEL_EQ_BASE = 11
};

enum SGPE_SLAVE_CONFIG_BITS
{
SLAVE_CONFIG_PM_DISABLE = BIT64(6),
SLAVE_CONFIG_PM_MUX_DISABLE = BIT64(7)
};

enum SGPE_STOP_CME_FLAGS
{
CME_TRACE_ENABLE = BIT32(4),
Expand Down Expand Up @@ -300,18 +294,16 @@ typedef struct
uint64_t data;
} SgpeScomRestore;

#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX
// Types for PB EQ asynch work-around
struct ring_save
{
uint64_t element[MAX_QUADS][8];
};
#endif

#if HW405292_NDD1_PCBMUX_FENCE_FIX
void p9_sgpe_set_slvcfg_pm_disable(uint32_t);
void p9_sgpe_clear_slvcfg_pm_disable(uint32_t);
#endif

/// SGPE to PGPE IPC handlers
void p9_sgpe_ipc_pgpe_ctrl_stop_updates(ipc_msg_t* cmd, void* arg);
Expand Down
27 changes: 20 additions & 7 deletions import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
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Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@ extern SgpeStopRecord G_sgpe_stop_record;

#endif

#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX

extern struct ring_save* G_ring_save;
extern uint64_t G_ring_spin[10][2];
Expand All @@ -61,7 +61,7 @@ p9_sgpe_stop_entry()
uint64_t local_xstop = 0;
data64_t scom_data = {0};
data64_t temp_data = {0};
#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX
uint32_t spin = 0;
#endif
#if !SKIP_IPC
Expand Down Expand Up @@ -892,16 +892,29 @@ p9_sgpe_stop_entry()

PK_TRACE_INF("SE.11D: Cache Clock Stopped");

#if HW405292_NDD1_PCBMUX_FENCE_FIX
// Gate the PCBMux request so scanning doesn't cause random requests
p9_sgpe_set_slvcfg_pm_disable(qloop);
#endif
PK_TRACE("Gate the PCBMux request so scanning doesn't cause random requests");

for(cloop = 0; cloop < CORES_PER_QUAD; cloop++)
{
// only loop over configured cores
if (!(G_sgpe_stop_record.group.core[VECTOR_CONFIG] &
BIT32((qloop << 2) + cloop)))
{
continue;
}

GPE_GETSCOM(GPE_SCOM_ADDR_CORE(C_SLAVE_CONFIG,
((qloop << 2) + cloop)), scom_data.value);
scom_data.words.upper |= BITS32(6, 2);
GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(C_SLAVE_CONFIG,
((qloop << 2) + cloop)), scom_data.value);
}

//=========================================
MARK_TAG(SE_POWER_OFF_CACHE, (32 >> qloop))
//=========================================

#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX

PK_TRACE_DBG("PBRW: Engage with PBIE Read/Write Pointer Scan Workaround");

Expand Down

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