Skip to content

Commit

Permalink
STOP: DD2 - abort entry on attn/recov + skip power off on OOB bits
Browse files Browse the repository at this point in the history 
Change-Id: Ia0eca836474585c1965c3ca5ad52c7530d5a65e0
Original-Change-Id: I6102ed0035a629506b8622a83a6b4853a00bb681
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33491
Reviewed-by: ADAM S. HALE <ashale@us.ibm.com>
Dev-Ready: ADAM S. HALE <ashale@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
  • Loading branch information
@davidduyue @op-jenkins
davidduyue authored and op-jenkins committed Aug 22, 2018
1 parent 5e74284 commit 395eb7a
Showing 1 changed file with 43 additions and 18 deletions.
61 changes: 43 additions & 18 deletions import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -103,6 +103,17 @@ p9_cme_stop_entry()
return CME_STOP_SUCCESS;
}

// NDD2: OOB bits wired to SISR
// not implemented in DD1
// bit1 is Recoverable Error
// bit2 is Special Attention
if (((core & CME_MASK_C0) && (in32(CME_LCL_SISR) & BITS32(13, 2))) ||
((core & CME_MASK_C1) && (in32_sh(CME_LCL_SISR) & BITS32(29, 2))))
{
PK_TRACE_INF("WARNING: Attn/Recov Present, Abort Entry and Return");
return CME_STOP_SUCCESS;
}

//===================================
MARK_TAG(BEGINSCOPE_STOP_ENTRY, core)
//===================================
Expand Down Expand Up @@ -687,26 +698,42 @@ p9_cme_stop_entry()

#if !STOP_PRIME

PK_TRACE("Drop vdd_pfet_val/sel_override/regulation_finger_en via PFCS[4,5,8]");
// vdd_pfet_val/sel_override = 0 (disbaled)
// vdd_pfet_regulation_finger_en = 0 (controled by FSM)
CME_PUTSCOM(PPM_PFCS_CLR, core, BIT64(4) | BIT64(5) | BIT64(8));
// NDD2: OOB bits wired to SISR
// not implemented in DD1
// bit0 is System checkstop
// bit1 is Recoverable Error
// bit2 is Special Attention
// bit3 is Core Checkstop
if (((core & CME_MASK_C0) && (in32(CME_LCL_SISR) & BITS32(12, 4))) ||
((core & CME_MASK_C1) && (in32_sh(CME_LCL_SISR) & BITS32(28, 4))))
{
PK_TRACE_INF("WARNING: Xstop/Attn/Recov Present, Skip Core Power Off");
}
else
{
PK_TRACE("Drop vdd_pfet_val/sel_override/regulation_finger_en via PFCS[4,5,8]");
// vdd_pfet_val/sel_override = 0 (disbaled)
// vdd_pfet_regulation_finger_en = 0 (controled by FSM)
CME_PUTSCOM(PPM_PFCS_CLR, core, BIT64(4) | BIT64(5) | BIT64(8));

PK_TRACE("Power off core VDD via PFCS[0-1]");
// vdd_pfet_force_state = 01 (Force Voff)
CME_PUTSCOM(PPM_PFCS_OR, core, BIT64(1));
PK_TRACE("Power off core VDD via PFCS[0-1]");
// vdd_pfet_force_state = 01 (Force Voff)
CME_PUTSCOM(PPM_PFCS_OR, core, BIT64(1));

PK_TRACE("Poll for power gate sequencer state: 0x8 (FSM Idle) via PFCS[42]");
PK_TRACE("Poll for power gate sequencer state: 0x8 (FSM Idle) via PFCS[42]");

do
{
CME_GETSCOM(PPM_PFCS, core, CME_SCOM_AND, scom_data);
}
while(!(scom_data & BIT64(42)));
do
{
CME_GETSCOM(PPM_PFCS, core, CME_SCOM_AND, scom_data);
}
while(!(scom_data & BIT64(42)));

PK_TRACE("Turn off force voff via PFCS[0-1]");
// vdd_pfet_force_state = 00 (Nop)
CME_PUTSCOM(PPM_PFCS_CLR, core, BITS64(0, 2));

PK_TRACE("Turn off force voff via PFCS[0-1]");
// vdd_pfet_force_state = 00 (Nop)
CME_PUTSCOM(PPM_PFCS_CLR, core, BITS64(0, 2));
PK_TRACE_INF("SE4.A: Core Powered Off");
}

#endif

Expand All @@ -720,8 +747,6 @@ p9_cme_stop_entry()
G_cme_stop_record.act_level_c1 = STOP_LEVEL_4;
}

PK_TRACE_INF("SE4.A: Core Powered Off");

//===========================
MARK_TAG(SE_STOP4_DONE, core)
//===========================
Expand Down

0 comments on commit 395eb7a

Please sign in to comment.