STOP: Assert Auto Special Wakeup mode on cores with halted CME

Key_Cronus_Test=PM_REGRESS

Change-Id: Ibe23e6beb305ca4bd35a30a4a6ec0346d40baf8b
Original-Change-Id: I743f270638697324dfc79b915023c76c5500229e
CQ: SW440106
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63410
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c

@@ -441,10 +441,10 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq)
 void p9_pgpe_irq_handler_cme_err()
 {
 
-    uint32_t q, idx, idx_off, freq_done;
+    uint32_t c, q, idx, idx_off, freq_done;
     uint32_t opit5pr;
     uint32_t opit5prQuad;
-    uint64_t value, baseVal;
+    uint64_t value, baseVal, coreSsh;
     qppm_dpll_freq_t dpllFreq;
     ocb_qcsr_t qcsr;
     qcsr.value = in32(G_OCB_QCSR);
@@ -503,6 +503,17 @@ void p9_pgpe_irq_handler_cme_err()
                 }
             }
 
+            /// Also read stop history of the cores belongs to both cmes,
+            //  and assert auto special wakeup mode for the core that is not gated.
+            for (c = 0; c < CORES_PER_QUAD; c++)
+            {
+                GPE_GETSCOM_VAR(PPM_SSHSRC, CORE_ADDR_BASE, ((q << 2) + c), 0, coreSsh);
+
+                if (!(coreSsh & BIT64(0)))
+                {
+                    GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_CLR, q, ((c & 2) >> 1)), (BIT64(12) >> (c & 1)));
+                }
+            }
 
             //1.2 The quad in error is stepped out of resonance by the PGPE. This keeps the cores that may be
             //  running in the quad operating. There is a momentary rise in power as resonance is disabled.