STOP: Move delay after LPID change to before asserting quiesce

Change-Id: Ia6ca4e34a22f3a392672c9d4970269f06444ec61
Original-Change-Id: Ie4f44477258ad97432a368949618189905ad9c25
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40626
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c

@@ -171,8 +171,6 @@ void turn_off_ram_mode (uint32_t core)
     PK_TRACE("LPID Clear core maintenance mode via direct controls");
     CME_PUTSCOM(DIRECT_CONTROLS, core, (BIT64(3) | BIT64(11) | BIT64(19) | BIT64(27)));
 
-    PK_TRACE("LPID Wait for 8K Core Cycles");
-    PPE_WAIT_CORE_CYCLES(8000);
 }
 
 #endif
@@ -564,6 +562,12 @@ p9_cme_stop_entry()
         out32(CME_LCL_LMCR_OR, (core << SHIFT32(13)));
 #endif
 
+
+#if HW402407_NDD1_TLBIE_STOP_WORKAROUND
+        // Need to wait for any pending TLBIEs to complete
+        PPE_WAIT_CORE_CYCLES(2000)
+#endif
+
         PK_TRACE("Assert core-L2 + core-CC quiesces via SICR[6/7,8/9]");
         out32(CME_LCL_SICR_OR, (core << SHIFT32(7)) | (core << SHIFT32(9)));