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STOP: Core Xstop Injection
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Change-Id: I0103eb23846cb29acbc69a2ff6ab595131cf83c6
Original-Change-Id: Ia39449ebf5a013abd74bd5c3c0d0ea7113e2a490
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41747
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
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@davidduyue @op-jenkins
davidduyue authored and op-jenkins committed Aug 22, 2018
1 parent b87f07a commit 92e7e51
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Showing 3 changed files with 67 additions and 42 deletions.
53 changes: 32 additions & 21 deletions import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
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Original file line number Diff line number Diff line change
Expand Up @@ -210,6 +210,8 @@ void p9_cme_pcbmux_savior_epilogue(uint32_t core)

#endif



void
p9_cme_stop_entry()
{
Expand Down Expand Up @@ -730,28 +732,25 @@ p9_cme_stop_entry()
#if NIMBUS_DD_LEVEL == 10

// NDD1: Core Global Xstop FIR
if (core & CME_MASK_C0)
for (core_mask = 2; core_mask > 0; core_mask--)
{
CME_GETSCOM(0x20040000, CME_MASK_C0, scom_data.value);

if (scom_data.value)
if (core & core_mask)
{
PK_TRACE_ERR("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
core, scom_data.words.upper);
PK_PANIC(CME_STOP_ENTRY_XSTOP_ERROR);
}
}
CME_GETSCOM(0x20040000, core_mask, scom_data.value);

if (core & CME_MASK_C1)
{
CME_GETSCOM(0x20040000, CME_MASK_C1, scom_data.value);
if (scom_data.value)
{
PK_TRACE_ERR("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. Gard Core!",
core_mask, scom_data.words.upper);
CME_STOP_CORE_ERROR_HANDLER(core, core_mask, CME_STOP_ENTRY_XSTOP_ERROR)
}

if (scom_data.value)
{
PK_TRACE_ERR("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
core, scom_data.words.upper);
PK_PANIC(CME_STOP_ENTRY_XSTOP_ERROR);
if (!core)
{
return;
}
}

}

#endif
Expand All @@ -769,12 +768,24 @@ p9_cme_stop_entry()
while(!(scom_data.words.upper & BIT32(8)));

PK_TRACE("Check core clock is stopped via CLOCK_STAT_SL[4-13]");
CME_GETSCOM_AND(C_CLOCK_STAT_SL, core, scom_data.value);

if (((~scom_data.value) & CLK_REGION_ALL_BUT_PLL) != 0)
for (core_mask = 2; core_mask > 0; core_mask--)
{
PK_TRACE_ERR("ERROR: Core Clock Stop Failed. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_STOPCLK_FAILED);
if (core & core_mask)
{
CME_GETSCOM(C_CLOCK_STAT_SL, core_mask, scom_data.value);

if (((~scom_data.value) & CLK_REGION_ALL_BUT_PLL) != 0)
{
PK_TRACE_ERR("ERROR: Core[%d] Clock Stop Failed. Gard Core!", core_mask);
CME_STOP_CORE_ERROR_HANDLER(core, core_mask, CME_STOP_ENTRY_STOPCLK_FAILED);

if (!core)
{
return;
}
}
}
}

PK_TRACE_INF("SE.2C: Core Clock Stopped");
Expand Down
38 changes: 23 additions & 15 deletions import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h
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Original file line number Diff line number Diff line change
Expand Up @@ -175,6 +175,12 @@ extern "C" {
#define PERV_NET_CTRL1_WAND 0x000F0045


#define SGPE_STOP_QUAD_ERROR_HANDLER(quad_error, panic_code) \
G_sgpe_stop_record.group.quad[VECTOR_ERROR] |= BIT32(quad_error); \
G_sgpe_stop_record.group.quad[VECTOR_CONFIG] &= ~BIT32(quad_error); \
G_sgpe_stop_record.group.quad[VECTOR_ACTIVE] &= ~BIT32(quad_error); \
G_sgpe_stop_record.state[quad_error].error_code = panic_code; \
//PK_PANIC(panic_code); //enable if desire halt on error

enum SGPE_STOP_STATE_HISTORY_VECTORS
{
Expand Down Expand Up @@ -228,25 +234,27 @@ enum SGPE_STOP_VECTOR_INDEX
VECTOR_EXIT = 3, //(core, quad_ipc qswu)
VECTOR_ACTIVE = 4, //(core_ipc, quad_ipc, qswu_active)
VECTOR_CONFIG = 5, //(core, quad)
VECTOR_RCLKE = 6, //(core_blocke, quad)
VECTOR_RCLKX = 7, //(core_blockx, quad)
VECTOR_PIGE = 8, //(core)
VECTOR_PIGX = 9, //(core)
VECTOR_PCWU = 10,//(core)
VECTOR_ERROR = 6, //( quad)
VECTOR_RCLKE = 7, //(core_blocke, quad)
VECTOR_RCLKX = 8, //(core_blockx, quad)
VECTOR_PIGE = 9, //(core)
VECTOR_PIGX = 10,//(core)
VECTOR_PCWU = 11 //(core)
};

typedef struct
{
// requested stop state calculated from core stop levels
uint8_t req_state_x0;
uint8_t req_state_x1;
uint8_t req_state_q;
uint8_t req_state_x0;
uint8_t req_state_x1;
uint8_t req_state_q;
// actual stop state
uint8_t act_state_x0;
uint8_t act_state_x1;
uint8_t act_state_q;
uint8_t act_state_x0;
uint8_t act_state_x1;
uint8_t act_state_q;
// both cme_flags: first(0:3) | enable(4:7)
uint8_t cme_flags;
uint8_t cme_flags;
uint32_t error_code;
} sgpe_state_t;

typedef struct
Expand All @@ -256,8 +264,8 @@ typedef struct
uint32_t qex0[2]; // 6 bits
uint32_t qex1[2]; // 6 bits
uint32_t qswu[5]; // 6 bits
uint32_t quad[8]; // 6 bits
uint32_t core[11];// 24 bits
uint32_t quad[9]; // 6 bits
uint32_t core[12];// 24 bits
} sgpe_group_t;

typedef struct
Expand All @@ -282,7 +290,7 @@ typedef struct
sgpe_group_t group;
sgpe_wof_t wof;
PkSemaphore sem[2];
} SgpeStopRecord;
} SgpeStopRecord __attribute__ ((aligned (8)));

typedef struct
{
Expand Down
18 changes: 12 additions & 6 deletions import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
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Original file line number Diff line number Diff line change
Expand Up @@ -318,7 +318,8 @@ p9_sgpe_stop_entry()
{
PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d Clk Ctrl Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_GET_CLK_LOCK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_GET_CLK_LOCK_FAILED);
continue;
}

PK_TRACE("Update QSSR: stop_entry_ongoing");
Expand Down Expand Up @@ -389,7 +390,8 @@ p9_sgpe_stop_entry()
if (((~(scom_data.words.upper)) & (ex << SHIFT32(9))) != 0)
{
PK_TRACE_ERR("ERROR: L2 clock stop failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_L2_STOPCLK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_L2_STOPCLK_FAILED);
continue;
}

// MF: verify compiler generate single rlwmni
Expand Down Expand Up @@ -482,7 +484,8 @@ p9_sgpe_stop_entry()
{
PK_TRACE_ERR("ERROR: Failed to Release Cache %d Clk Ctrl Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_DROP_CLK_LOCK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_DROP_CLK_LOCK_FAILED);
continue;
}

//==================================================
Expand Down Expand Up @@ -518,7 +521,8 @@ p9_sgpe_stop_entry()
{
PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d PCB Slave Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED);
continue;
}

PK_TRACE("Update QSSR: stop_entry_ongoing");
Expand Down Expand Up @@ -986,7 +990,8 @@ p9_sgpe_stop_entry()
if (((~scom_data.value) & CLK_REGION_ALL) != 0)
{
PK_TRACE_ERR("ERROR: Cache clock stop failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_EQ_STOPCLK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_EQ_STOPCLK_FAILED);
continue;
}

PK_TRACE("Assert vital fence via CPLT_CTRL1[3]");
Expand Down Expand Up @@ -1174,7 +1179,8 @@ p9_sgpe_stop_entry()
{
PK_TRACE_ERR("ERROR: Failed to Release Cache %d PCB Slave Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_DROP_SLV_LOCK_FAILED);
SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_DROP_SLV_LOCK_FAILED);
continue;
}

for(cloop = 0; cloop < CORES_PER_QUAD; cloop++)
Expand Down

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