STOP: Fix PIG in L2 Resonant Clock support

Patch 16 starts adding on stop8+ stravation solution
SGPE FIT timer ratio is set to 0x08 (1ms)
and Handler counter counts 25 times (25ms)

Change-Id: I8e93430de5d4f06780c432384a143884fd04c3f4
Original-Change-Id: I19137f1fd7cea2bce1b478a1f361306381072854
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44448
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h

@@ -47,6 +47,7 @@ extern "C" {
 #include "ppm_register_addresses.h"
 #include "cppm_register_addresses.h"
 #include "qppm_register_addresses.h"
+#include "gpe_register_addresses.h"
 
 #include "ocb_firmware_registers.h"
 #include "cme_firmware_registers.h"
@@ -279,6 +280,11 @@ typedef struct
     ipc_msg_t* suspend_cmd;
 } sgpe_wof_t;
 
+typedef struct
+{
+    uint32_t strave_counter;
+} sgpe_fit_t;
+
 /// SGPE Stop Score Board Structure
 typedef struct
 {
@@ -290,6 +296,7 @@ typedef struct
     // group of ex and quad entering or exiting the stop
     sgpe_group_t group;
     sgpe_wof_t   wof;
+    sgpe_fit_t   fit;
     PkSemaphore  sem[2];
 } SgpeStopRecord __attribute__ ((aligned (8)));
 
@@ -320,8 +327,10 @@ void p9_sgpe_ipc_pgpe_suspend_stop(ipc_msg_t*, void*);
 void p9_sgpe_stop_suspend_all_cmes();
 
 /// SGPE STOP Interrupt Handlers
+void p9_sgpe_fit_handler();
 void p9_sgpe_pig_type2_handler(void*, PkIrqId);
 void p9_sgpe_pig_type3_handler(void*, PkIrqId);
+void p9_sgpe_pig_type5_handler(void*, PkIrqId);
 void p9_sgpe_pig_type6_handler(void*, PkIrqId);
 void p9_sgpe_ipi3_low_handler(void*, PkIrqId);
 void p9_sgpe_stop_suspend_db1_cme(uint32_t, uint32_t);

import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c

@@ -82,6 +82,8 @@ p9_sgpe_stop_entry()
     for(qloop = 0; qloop < MAX_QUADS; qloop++)
     {
         if ((G_sgpe_stop_record.group.qswu[VECTOR_ACTIVE] |
+             G_sgpe_stop_record.group.quad[VECTOR_RCLKE]  |
+             G_sgpe_stop_record.group.quad[VECTOR_BLOCKE] |
              (~G_sgpe_stop_record.group.quad[VECTOR_CONFIG])) & BIT32(qloop))
         {
             continue;
@@ -125,9 +127,9 @@ p9_sgpe_stop_entry()
            G_sgpe_stop_record.state[qloop].req_state_q >= LEVEL_EQ_BASE)
         {
             // if resonant clock disable is completed, process stop11 entry
-            if (G_sgpe_stop_record.group.quad[VECTOR_RCLKE] & BIT32(qloop))
+            if (G_sgpe_stop_record.group.quad[VECTOR_RCLKE] & BIT32((qloop + 16)))
             {
-                G_sgpe_stop_record.group.quad[VECTOR_RCLKE] &= ~BIT32(qloop);
+                G_sgpe_stop_record.group.quad[VECTOR_RCLKE] &= ~BIT32((qloop + 16));
 
                 // if during resonant clock disable, any exit occured, re-assert them,
                 // but we are going to complete the stop11 entry prior to process it
@@ -163,6 +165,9 @@ p9_sgpe_stop_entry()
             // send DB to Quad-Manager to disable the resonant clock
             else
             {
+                // from this point on, only process wakeup when stop11 is entered
+                G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32(qloop);
+
                 // assume ex0 core0 is good
                 cindex = (qloop << 2);
 
@@ -537,18 +542,6 @@ p9_sgpe_stop_entry()
 
         PK_TRACE_INF("SE.11A: Quad[%d] EX_PG[%d] Shutting Cache Down", qloop, ex);
 
-        PK_TRACE("Acquire cache PCB slave atomic lock");
-        GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), BITS64(0, 5));
-        GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), scom_data.value);
-
-        if ((scom_data.words.upper & BITS32(0, 5)) != 0xC0000000)
-        {
-            PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d PCB Slave Atomic Lock. Register Content: %x",
-                         qloop, scom_data.words.upper);
-            SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED);
-            continue;
-        }
-
         PK_TRACE("Update QSSR: stop_entry_ongoing");
         out32(OCB_QSSR_OR, BIT32(qloop + 20));
 
@@ -739,17 +732,6 @@ p9_sgpe_stop_entry()
         {
             PK_TRACE_INF("Abort: L3 Purge Aborted");
 
-            PK_TRACE("Release cache PCB slave atomic lock");
-            GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), 0);
-            GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), scom_data.value);
-
-            if (scom_data.words.upper & BIT32(0))
-            {
-                PK_TRACE_ERR("ERROR: Failed to Release Cache %d PCB Slave Atomic Lock. Register Content: %x",
-                             qloop, scom_data.words.upper);
-                PK_PANIC(SGPE_STOP_EXIT_DROP_SLV_LOCK_FAILED);
-            }
-
             // assume ex0 core0 is good
             cindex = (qloop << 2);
 
@@ -851,6 +833,18 @@ p9_sgpe_stop_entry()
         MARK_TAG(SE_PURGE_PB, (32 >> qloop))
         //==================================
 
+        PK_TRACE("Acquire cache PCB slave atomic lock");
+        GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), BITS64(0, 5));
+        GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), scom_data.value);
+
+        if ((scom_data.words.upper & BITS32(0, 5)) != 0xC0000000)
+        {
+            PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d PCB Slave Atomic Lock. Register Content: %x",
+                         qloop, scom_data.words.upper);
+            SGPE_STOP_QUAD_ERROR_HANDLER(qloop, SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED);
+            continue;
+        }
+
         // Stopping CME first in case CME initiates Powerbus Traffic
 
         if (ex & FST_EX_IN_QUAD)