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Correct gpe timebase
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Change-Id: I47524f8400d1b5f2ed5423c2bea105a22a099205
CQ: SW402715
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46917
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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dgilbert999 authored and marthabroyles committed Oct 3, 2017
1 parent 28ba8e8 commit 119f37b
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Showing 4 changed files with 21 additions and 25 deletions.
2 changes: 1 addition & 1 deletion src/common/gpe_export.h
Expand Up @@ -58,7 +58,7 @@ typedef struct nop

typedef struct gpe_shared_data
{
uint32_t nest_freq_div; // Nest freq / 4
uint32_t nest_freq_div; // Nest freq / 64
uint32_t spipss_spec_p9; // Which APSS spec to use
uint32_t fir_heap_buffer_ptr;
uint32_t fir_params_buffer_ptr;
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7 changes: 4 additions & 3 deletions src/occ_405/main.c
Expand Up @@ -2071,9 +2071,10 @@ int main(int argc, char **argv)
0,
l_tb_freq_hz);

// Store the nest / 4 frequency in shared SRAM so the GPEs
// can be initialized with the correct timebase as well.
G_shared_gpe_data.nest_freq_div = l_tb_freq_hz;
// The GPEs are configured to use the OCB_OTBR as a timebase.
// This counter runs at (nest freq)/64. The 405 timebase frequency runs at
// (nest freq)/4, so divide this by 16 to get the gpe timebase frequency.
G_shared_gpe_data.nest_freq_div = l_tb_freq_hz/16;

CHECKPOINT(SSX_INITIALIZED);
// TRAC_XXX needs ssx services, traces can only be done after ssx_initialize
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33 changes: 14 additions & 19 deletions src/occ_gpe0/gpe_util.c
Expand Up @@ -159,29 +159,24 @@ int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint32_t i_timeout)
*/
void busy_wait(uint32_t i_microseconds)
{
uint32_t start_decrementer_value; // The decrementer register value at the beginning
uint32_t end_decrementer_value; // The decrementer register value at the end
uint32_t current_decrementer_value; // The current decrementer register value
uint32_t duration;
MFDEC(start_decrementer_value); // get the decrementer register value at the beginning
current_decrementer_value = start_decrementer_value;
uint32_t current_count = pk_timebase32_get();
uint32_t end_count = current_count +
PK_INTERVAL_SCALE((uint32_t)PK_MICROSECONDS(i_microseconds));

// multiply the delay time by the external clock frequency (~37.5 MHz)
duration = (i_microseconds * 37);
duration += (i_microseconds >> 1);

// Calculate the decrementer register value at the end of the busy wait period
end_decrementer_value = start_decrementer_value - duration;

if(start_decrementer_value < end_decrementer_value) // decrementer overflows during the busy wait?
// Handle wrap case
if(current_count > end_count)
{
MFDEC(current_decrementer_value);
while(current_decrementer_value < end_decrementer_value) // Wait until Decrementer overflows
MFDEC(current_decrementer_value);
// let counter roll over
while(current_count > end_count)
{
current_count = pk_timebase32_get();
}
}

while (current_decrementer_value > end_decrementer_value) // Wait until end_decrementer_value is reached
MFDEC(current_decrementer_value);
while (current_count < end_count)
{
current_count = pk_timebase32_get();
}
}

/*
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4 changes: 2 additions & 2 deletions src/ppe/pk/ppe42/ppe42_core.c
Expand Up @@ -128,9 +128,9 @@ __pk_schedule_hardware_timeout(PkTimebase timeout)
{
diff = (timeout - now);

if (diff > 0xfffffffful)
if (diff > 0xffff0000ull)
{
new_dec = 0xffffffff;
new_dec = 0xffff0000;
}
else
{
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