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FIRDATA: remove Cumulus/Centaur targets and add Axone/Explorer
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Change-Id: I1776bafec4aa5dcedcc2202413f3f997788c9b57
RTC: 201994
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69529
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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zane131 authored and marthabroyles committed Jan 2, 2019
1 parent 75f2dd3 commit d60be21
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Showing 4 changed files with 65 additions and 165 deletions.
29 changes: 6 additions & 23 deletions src/occ_gpe0/firdata/firData.c
Original file line number Diff line number Diff line change
Expand Up @@ -930,8 +930,6 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
<< (32 - MAX_MC_PER_PROC);
l_existBits.mcs_mi_Mask = ((uint32_t)(l_cumExistBitPtr->miMask))
<< (32 - MAX_MI_PER_PROC);
l_existBits.mca_dmi_Mask = ((uint32_t)(l_cumExistBitPtr->dmiMask))
<< (32 - MAX_DMI_PER_PROC);
l_existBits.cappMask = ((uint32_t)(l_cumExistBitPtr->cappMask))
<< (32 - MAX_CAPP_PER_PROC);
l_existBits.pecMask = ((uint32_t)(l_cumExistBitPtr->pecMask))
Expand Down Expand Up @@ -1102,26 +1100,16 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )


/* processor type can impact next few units */
TrgtType_t l_pnorTarget = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
TRGT_MCBIST : TRGT_MC;
uint32_t l_maxPerProc = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
MAX_MCBIST_PER_PROC : MAX_MC_PER_PROC;

TrgtType_t l_pnorTarg2 = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
TRGT_MCA : TRGT_DMI;
uint32_t l_maxPerProc2 = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
MAX_MCA_PER_PROC : MAX_DMI_PER_PROC;

uint32_t l_UnitPerMc = l_maxPerProc2 / l_maxPerProc;
uint32_t l_UnitPerMc = MAX_MCA_PER_PROC / MAX_MCBIST_PER_PROC;
uint8_t l_unitNumber;

for ( u = 0; u < l_maxPerProc; u++ )
for ( u = 0; u < MAX_MCBIST_PER_PROC; u++ )
{
/* Check if MCBIST / MC is configured. */
if ( 0 == (l_existBits.mcbist_mc_Mask & (0x80000000 >> u)) ) continue;

/* Add this MCBIST or MC to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(l_pnorTarget, p, u, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_MCBIST, p, u, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr );
if ( full ) break;
if ( noAttn ) continue; /* Skip the rest */
Expand All @@ -1136,7 +1124,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
if ( 0 == (l_existBits.mca_dmi_Mask & (0x80000000 >> l_unitNumber)) ) continue;

/* Add this MCA / DMI to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(l_pnorTarg2, p, l_unitNumber, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_MCA, p, l_unitNumber, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr );
if ( full ) break;

Expand All @@ -1147,18 +1135,13 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
if ( full ) break;


l_pnorTarget = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
TRGT_MCS : TRGT_MI;
l_maxPerProc = (HOMER_CHIP_NIMBUS == l_chipPtr->chipType) ?
MAX_MCS_PER_PROC : MAX_MI_PER_PROC;

for ( u = 0; u < l_maxPerProc; u++ )
for ( u = 0; u < MAX_MCS_PER_PROC; u++ )
{
/* Check if the MCS / MI is configured. */
if ( 0 == (l_existBits.mcs_mi_Mask & (0x80000000 >> u)) ) continue;

/* Add this MCS or MI to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(l_pnorTarget, p, u, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_MCS, p, u, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr );
if ( full ) break;
}
Expand Down
45 changes: 20 additions & 25 deletions src/occ_gpe0/firdata/firDataConst_common.h
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/occ_405/firdata/firDataConst_common.h $ */
/* $Source: src/occ_gpe0/firdata/firDataConst_common.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -33,16 +33,12 @@
#include <stdint.h>

/** Target types for all supported targets. */
/** NOTE: These are used to build the register list in HOMER data */
/** and also to create the exiting chiplet masks. Hence, */
/** the numbers assigned here have to match the sequence */
/** of chiplets in HOMER_ChipNimbus_t, HOMER_ChipCumulus_t, etc. */
typedef enum
{
/* NOTE: These will be used as array indexes. */
TRGT_FIRST = 0,

/** Common Nimbus/Cumulus types */
/** Common Nimbus/Axone types */
TRGT_PROC = TRGT_FIRST,
TRGT_CAPP,
TRGT_XBUS,
Expand All @@ -58,16 +54,15 @@ typedef enum
TRGT_MCS,
TRGT_MCA,

/* Cumulus only */
/* NOTE: Nimbus and Cumulus cannot be used at the same time. So we can have
* These array indexes overlap to save space. */
TRGT_MC = TRGT_MCBIST,
/* Axone only */
TRGT_MC,
TRGT_MI,
TRGT_DMI,
TRGT_MCC,
TRGT_OMIC,
TRGT_NPU,

/* Centaur only */
TRGT_MEMBUF,
TRGT_MBA,
/* Explorer only */
TRGT_OCMB,

TRGT_MAX,

Expand All @@ -76,11 +71,11 @@ typedef enum
/** Boundary/position ranges for each target type. */
typedef enum
{
/* Common Nimbus/Cumulus */
/* Common Nimbus/Axone */
MAX_PROC_PER_NODE = 8,
MAX_CAPP_PER_PROC = 2,
MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Cumulus 0, 1, and 2 */
MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Cumulus 0, 1, 2, and 3 */
MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Axone 0, 1, and 2 */
MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Axone 0, 1, 2, and 3 */
MAX_PEC_PER_PROC = 3,
MAX_PHB_PER_PROC = 6,
MAX_EQ_PER_PROC = 6,
Expand All @@ -92,16 +87,16 @@ typedef enum
MAX_MCS_PER_PROC = 4,
MAX_MCA_PER_PROC = 8,

/** Cumulus only */
/** Axone only */
MAX_MC_PER_PROC = 2,
MAX_MI_PER_PROC = 4,
MAX_DMI_PER_PROC = 8,
MAX_MCC_PER_PROC = 8,
MAX_OMIC_PER_PROC = 6,
MAX_NPU_PER_PROC = 3,

/** Centaur only */
MAX_MEMBUF_PER_PROC = 8,
MAX_MEMBUF_PER_NODE = MAX_MEMBUF_PER_PROC * MAX_PROC_PER_NODE,
MAX_MBA_PER_MEMBUF = 2,
MAX_MBA_PER_PROC = MAX_MEMBUF_PER_PROC * MAX_MBA_PER_MEMBUF,
/** Explorer only */
MAX_OCMB_PER_PROC = 16 ,
MAX_OCMB_PER_NODE = MAX_OCMB_PER_PROC * MAX_PROC_PER_NODE,

} TrgtPos_t;

Expand Down
64 changes: 36 additions & 28 deletions src/occ_gpe0/firdata/scom_trgt.c
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/occ_405/firdata/scom_trgt.c $ */
/* $Source: src/occ_gpe0/firdata/scom_trgt.c $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand All @@ -27,7 +27,7 @@
#include <scom_trgt.h>
#include <scom_util.h>

/*------------------------------------------------------------------------------ */
/*----------------------------------------------------------------------------*/

SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos,
uint8_t i_procUnitPos, uint32_t i_fsiBaseAddr,
Expand All @@ -44,17 +44,18 @@ SCOM_Trgt_t SCOM_Trgt_getTrgt( TrgtType_t i_type, uint8_t i_procPos,
if (TRGT_PROC == trgt.type)
{
trgt.procUnitPos = 0;
}
}

if ( TRGT_MEMBUF == trgt.type || TRGT_MBA == trgt.type )
/* Only processor targets can be on the master processor. */
if ( TRGT_OCMB == trgt.type )
{
trgt.isMaster = false;
}

return trgt;
}

/*------------------------------------------------------------------------------ */
/*----------------------------------------------------------------------------*/

uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt )
{
Expand All @@ -74,16 +75,16 @@ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt )
case TRGT_MCBIST:
case TRGT_MCS:
case TRGT_MCA:
case TRGT_MC:
case TRGT_MI:
case TRGT_MCC:
case TRGT_OMIC:
case TRGT_NPU:
p = i_trgt.procPos;
break;

case TRGT_MEMBUF: /* TODO RTC 173614 -- with CUMULUS */
p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) + i_trgt.procUnitPos;
break;

case TRGT_MBA: /* TODO RTC 173614 -- with CUMULUS */
p = (i_trgt.procPos * MAX_MEMBUF_PER_PROC) +
(i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF);
case TRGT_OCMB:
p = (i_trgt.procPos * MAX_OCMB_PER_PROC) + i_trgt.procUnitPos;
break;

default: ;
Expand All @@ -92,7 +93,7 @@ uint8_t SCOM_Trgt_getChipPos( SCOM_Trgt_t i_trgt )
return p;
}

/*------------------------------------------------------------------------------ */
/*----------------------------------------------------------------------------*/

uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt )
{
Expand All @@ -101,7 +102,7 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt )
switch ( i_trgt.type )
{
case TRGT_PROC:
case TRGT_MEMBUF: u = 0; break;
case TRGT_OCMB: u = 0; break;

case TRGT_CAPP:
case TRGT_XBUS:
Expand All @@ -113,18 +114,20 @@ uint8_t SCOM_Trgt_getChipUnitPos( SCOM_Trgt_t i_trgt )
case TRGT_EC:
case TRGT_MCBIST:
case TRGT_MCS:
case TRGT_MCA: u = i_trgt.procUnitPos; break;

case TRGT_MBA: u = i_trgt.procUnitPos % MAX_MBA_PER_MEMBUF; break;
/* TODO RTC 173614 -- with CUMULUS */
case TRGT_MCA:
case TRGT_MC:
case TRGT_MI:
case TRGT_MCC:
case TRGT_OMIC:
case TRGT_NPU: u = i_trgt.procUnitPos; break;

default: ;
}

return u;
}

/*------------------------------------------------------------------------------ */
/*----------------------------------------------------------------------------*/

SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt )
{
Expand All @@ -142,10 +145,14 @@ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt )
case TRGT_EC:
case TRGT_MCBIST:
case TRGT_MCS:
case TRGT_MCA: t = TRGT_PROC; break;
case TRGT_MCA:
case TRGT_MC:
case TRGT_MI:
case TRGT_MCC:
case TRGT_OMIC:
case TRGT_NPU: t = TRGT_PROC; break;

case TRGT_MEMBUF:
case TRGT_MBA: t = TRGT_MEMBUF; break;
case TRGT_OCMB: t = TRGT_OCMB; break;

default: ;
}
Expand All @@ -165,11 +172,12 @@ SCOM_Trgt_t SCOM_Trgt_getParentChip( SCOM_Trgt_t i_trgt )
case TRGT_MCBIST:
case TRGT_MCS:
case TRGT_MCA:
case TRGT_MEMBUF: u = i_trgt.procUnitPos; break;
/* TODO RTC 173614 -- with CUMULUS */

case TRGT_MBA: u = i_trgt.procUnitPos / MAX_MBA_PER_MEMBUF; break;
/* TODO RTC 173614 -- with CUMULUS */
case TRGT_MC:
case TRGT_MI:
case TRGT_MCC:
case TRGT_OMIC:
case TRGT_NPU:
case TRGT_OCMB: u = i_trgt.procUnitPos; break;

default: ;
}
Expand Down

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