chip_ec_attributes.xml

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<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml $ -->
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<!-- OpenPOWER sbe Project                                                  -->
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<!-- [+] International Business Machines Corp.                              -->
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<!-- IBM_PROLOG_END_TAG                                                     -->
<!--
    XML file specifying HWPF attributes.
    These are example Chip EC Feature attributes that specify chip features
    based on the EC level of a chip
-->

<attributes>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if the core trace arrays are dumpable via SCOM.
      Nimbus EC 0x20 or greater
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TEST1</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
      Returns if a chip contains the TEST1 feature. True if either:
      Centaur EC 10
      Cumulus EC greater than 30
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CENTAUR</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x30</value>
          <test>GREATER_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TEST2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
      Returns if a chip contains the TEST2 feature. True if:
      Murano EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 for differentiating present/functional targets. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 update : Flush mode not initiated for N3. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SECURE2UNSECURE_SETUP</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only : Change chip to unsecure mode if SMD PIN is high. if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: disable local clock gating VITAL. This is used by the
      procedure for p9_sbe_tp_chiplet_init1 and p9_Sbe_chiplet_reset.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SDISN_SETUP</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Sdis_n set or clear : flushing LCBES condition woraround. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** --> 
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW388878</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW388878 (VCS)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW376651</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW376651
      Masks ahash parity error checker to avoid FiR when running EX1 only configs
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW389511</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW389511 (PPM Reg collision)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PSI_HALF_SPEED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable half speed PSI link operation due to relaxed
      chip timing closure
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->

  <!-- ******************************************************************** -->
  <!-- Memory Section                                                       -->
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_UT_EC_NIMBUS_LESS_THAN_TWO_OH</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Attribute used only for memory subsystem unit tests. Tells us whether
      the chip EC we're running on is less than 2.0 and we're on a Nimbus
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MCBIST_END_OF_RANK</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      MCBIST has a bug where it won't detect the end of a rank properly for
      a 1R DIMM during super-fast read.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_WR_VREF</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In DD1 Nimbus in the WR VREF algorithm, certain work-arounds are needed
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_DQS_POLARITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Monza DDR port 2, one pair of DQS P/N is swapped polarity.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Override VREG control information
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      VREF DAC work-around for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      VREG Coarse work-around for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <!-- End Memory Section                                                   -->
  <!-- ******************************************************************** -->
</attributes>