chip_ec_attributes.xml

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<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml $ -->
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<!-- [+] International Business Machines Corp.                              -->
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<!-- IBM_PROLOG_END_TAG                                                     -->
<!--
    XML file specifying HWPF attributes.
    These are example Chip EC Feature attributes that specify chip features
    based on the EC level of a chip
-->

<attributes>

  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW409026</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Optics DLL fast async cross causes DLL internal errs
       Fixed on all chips but Nimbus.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       The chip had a consolodated npu_top.
       True for Nimbus and Cumulus, not Axone
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NPU_SMF_NIMBUS_CUMULUS</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Defines ec levels where SMF is supported for Nimbus/Cumulus.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NPU_SMF_AXONE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Defines ec levels where SMF is supported for Axone.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CP_FILTER_100MHZ</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       True where CP refclock is expected to be 100 MHz
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       I2CM internal clock divider is div2 , not div4
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 FBC setting differs from DD2, ex. lo_limit adjustment.
      Adding for Axone as it has A-link support
      True if Nimbus dd2 or greater or cumulus
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_XBUS_COMPRESSION_WORKAROUND</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Modifies calibration gain targets and moves common mode to improve
        DAC linearity and compression.
      Enable only for Axone.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: NPU2 FIR not present
      Axone, does not have a single npu_top.  Instead
      it has npu_top0..2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_LOCAL_TRACE2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Does the core has TRACE2 with LOCAL dial names
      (Nimbus dd2.X and Cumulus, Not Axone)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW416934_HW419818</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1, DD2.0, DD2.1, Cumulus DD1 only; Combined into a single WAT solution
      HW416934 - Cache Inhibited (I=1) lxvd2x load sends 8 byte load to NCU instead of 16 byte
      HW419818 - stcx bug in the S2QA / S2Q drain stall
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_NIMDD22_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Force Nimbus DD2.2-specific security settings
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_FLUSH_L1D_TRIG</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       MTTRIG2 setup to flush L1D
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW420171</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Disable HW420171 Fix
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW413922</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Nimbus DD2.2 - Disable HW413922 Fix
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414249_ROUND2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Additional chickenswitch needed to mitigate HW414249
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423358</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW423358 - NDD2.2+ / CDD1.1+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW436858</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW436858 - TM suspend WAT workaround
      Note: This workaround is only needed for NDD22/CDD11, but this attribute
            will also be true for NDD23 for its compatibility modes
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW433038</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW433038 - LSU clockgating bug
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NEW_TM_MODE</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable new TM handling for NDD2.2+ and CDD1.1+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DIS_HW419330</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable fix for HW419330 on Cumulus-based (PHYP) systems
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430233</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW430233
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NDD23_SEC_BLOCK_ISSUE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable Nimbus-specific secure block issue settings
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SEC_BLOCK_ISSUE</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable secure block issue setting
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430233_ROUND2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW430233 - Disable fix in later chips
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW434484_HW452921</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW434484 / HW452921 - ISU clockgate
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW426420</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Additional workaround needed for TM - NDD2.2 / CDD1.1 only
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW420489</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW420489
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW419082</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW419082
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EN_FULL_DERAT</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable full ERAT usage
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430944_DISFIX</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW430944 Quaint Gate - disable fix to match p9c1.1 p9n2.2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW437436_DISFIX</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW437436 Son of Quaint Gate - disable fix to match p9c1.1 p9n2.2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430944_ROUND2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW430944 Quaint Gate
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW446279</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW446279 SMP Abus Cable Failure
      Use PPE SW recovery
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW446279_DISABLE_FIX</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW446279 SMP Abus Cable Failure
      Disable HW fixes to rely on PPE SW recovery
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430944</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW430944 Quaint Gate
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417233</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1, DD2.0, DD2.1, Cumulus DD1 only:
      HW417233 - Copy paste lsu bug
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9_NO_NDL_IOVALID</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if the chip has no NDL IOValid bits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DMI_MC_PLL_SCAN_BUCKETS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Use nest buckets for mc_pll_bndy for cumulus
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EARLYMODE_FIX</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if MPW2 bits should be set
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_TRACE_NOT_SCOMABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if the core trace arrays are not dumpable via SCOM.
      Permanent erratum for all P9 chips, hence true for all.
    </description>
    <chipEcFeature>
      <falseIfMatch/>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0xAF</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TRCTRL_HAS_NO_RUN_BITS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if the trace array TRCTRL registers do not have run, run_sticky and hold_run bits
      Nimbus EC 0x10
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TEST1</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
      Returns if a chip contains the TEST1 feature. True if either:
      Centaur EC 10
      Cumulus EC greater than 30
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CENTAUR</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x30</value>
          <test>GREATER_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TEST2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
      Returns if a chip contains the TEST2 feature. True if:
      Murano EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 update : Flush mode not initiated for N3. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: disable local clock gating VITAL. This is used by the
      procedure for p9_sbe_tp_chiplet_init1 and p9_Sbe_chiplet_reset.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SDISN_SETUP</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Sdis_n set or clear : flushing LCBES condition woraround. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_THREAD_REBALANCING</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: Thread rebalancing to lower SMT level not supported.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407180</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Apply Nimbus DD1 specific filter PLL settings
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423532</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Apply bgoffset m1 to filter PLLs
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423535</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Apply bandwidth updates to filter PLLs + OBUS Tank PLL
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW365079</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       DD1 only config, issue: HW365079
       Planning on enabling it with an irritator.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW367017</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       HW367017 P9N DD1
       Collision with scrubber correcting a CE and a castout operation, resulting in cache corruption
       Scrubbing off for DD2 as well, HW405443
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393692</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        HW393692 - need to turn off NCU hardware checker (fir bit 2) for illegal tlbies/slbie formats for DD1.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW372146</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        HW372146 For turning off clock gating on nctlbsm
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405413</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       HW405413 : NCU sends data out of order
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW328175</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       HW328175 : PB mode register does not reflect steady-state value
       of PB init
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW367321</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        HW367321 clock gating bug on err_rpt
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW254454</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        HW254454: In P9 DD1, DRAM_ABIST_DONE_DC is unused; SRAM_ABIST_DONE_DC is shared by sram and edram
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW375534</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Max 24 64-byte read buffers (HW375534)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW366248</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        FOR P9N DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248)
            Always OR-ed with previous value. Essentially we can only set bits, not clear. So we want to scan init to 0.
            these are n1 n3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW395756</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW395756
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW396288</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW396288 - Dispatch Serialize all mtmsrd
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW394497</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW394497 - Turn all mtfpscr/mffspcr ops Dispatch Serialize to enable speculative FPSCR. (HW374002)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW394447_HW394186</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW394447 / HW394186
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393129</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW393129
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393318</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW393318 - Turn all decimal quad ops Dispatch Serialize.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430539</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.X / Cumulus DD1.X - Enable tlbie hangbuster
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DIS_241</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1/DD2.0, Cumulus DD1.0: HW393547, HW413718
      HW447773 - Fixed in Nimbus DD2.3 and Cumulus DD1.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW447585_CDD13_NDD23</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW447585 - disable slbwalk - dials changed in CDD1.3+/NDD2.3+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW447585</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW447585 - disable slbwalk
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW447589</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW447589 - disable tlb_miss SDAR writes on mixed translation products
               - fixed on Nimbus DD2.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EMQ_DIS_TRACKER_ROUND2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable tracker fix for CDD1.1+/NDD2.3+/ADD1.0+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EMQ_DIS_TRACKER</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1.0: HW393929 / HW394578
      Nimbus DD2.0 / Cumulus DD1.0: HW416227
      Nimbus DD2.1 / Nimbus DD2.2 / Cumulus DD1.1: HW425027
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW425526_ROUND2</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus DD1.1+ / Nimbus 2.3+ - Undo fix
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW425526</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW425526 - Force H-Bit in the TLB
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SW406970</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       SW406970 - SCOM clockgating issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW362088</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW362088
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW391334_HW391367</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW391334 / HW391367
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW387890</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW387890
         NOTE: should be turned back off if LSU gets stuck in a cyclical ntc_plz loop.
         This switch was added in RITB as part of a large, multiple-fix solution
         for the cycling ntc_plz with DEFAULT=OFF.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW384613</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW384613
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW373955</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW373955
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW381889</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW381889 - Disable TM ROT mode
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW379315</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW379315 - Fix tiered hangbuster triggering ntc_plz
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW347876</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW347876 - default not correct
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_PAGE_WALK_CACHE_HITS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW373955 - In Radix Mode: Page Walk Cache unsupported
                       HW361596 / HW371500 / HW373955 - In SDR1 mode and UPRT=1 mode:
                                  Disable Page Walk Cache hits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_RFC02491</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: DD1 Defer -ldmx not supported (i.e. Garbage Collection RFC02491)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW359913_HW356752</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW359913 / HW356752
                       ltptr not supported - will be treated as an illegal instruction
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW364229</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW364229 - enb_reduce_spec mode, causes a tlbie hang
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW330187</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW330187 - Instruction Fusion not supported
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW371453</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW371453
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW379562_HW419742</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW379562 - Turn off store-forward to LQ
      Nimbus DD2.0/DD2.1, Cumulus DD1.0: HW419742
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW443669</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW443669
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW443982</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW443982 - Fixed in NDD2.3 and CDD1.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW371047_HW415528_HW420575</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: HW371047 - TMDIR disabled due to multi-threaded issue.
      Nimbus DD2.0 / Cumulus DD1.0: HW415528
      Nimbus DD2.1: HW420575
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW416317</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW416317
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW373589</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW373589 - Reject 2nd of lqarx pair ops if they are on back-to-back cycles.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW373167</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW373167 - Problems with arbitrating between NTC and NTC+1 flush requests when one is
                       recoverable and the other involves trechkpt.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW372808</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW372808 - TM hwsync does not wait on load
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW372208</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW372208 - larx missed bad dval
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW373137</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW373137 - Stop prefetch and invalidate erat collison causing erat multihits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW371867</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW371867 - Performance enhancement that is too buggy to leave enabled
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW368478</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW368478 - S2Q clock gate has to be disabled
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW360131</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW360131 - POR value is an invalid combination and is not represented in the dial.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW404199</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.x / Cumulus DD1.x - HW404199 / HW422083
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW370085</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW370085 - IFU can send an erroneous 2nd "force miss" to the LSU on a shared translation,
                       causing an unnecessary table walk.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW369677</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW369677 - Dynamic set delete not implemented
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW367863</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW367863 - Workaround when EAT thinks it's empty and IDU still reports that it's out
                       of itags.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW365384</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW365384 - data prefetch clock gate needed
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW365576</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW365576 - Need to disable reset of LRQ deallocate bit
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW365510</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW365510 - TM merging in the LRQ not supported - disable with chicken switch
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_SPEC_STWCX</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1.0 DD2.0, Cumulus DD1.0
                       HW353069 / HW358383 / HW358418 / HW358662 / HW358824 / HW363605
                       Not doing Performance: MB State - Need to disable speculative stwcx
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW363926</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW363926 - Workaround for clockgating bug for Local Very Good Mode (performance)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW339090_HW354135</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW339090 / HW354135 - Branch flush performance
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW361821</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW361821 - Icache way prediction must be disabled for all SMT modes except SMT1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW380199</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW380199 - L2 store reordering induced consistency bug
                       Only set at safest risk level
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399524</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW399524 disable functionality, can only be enabled on non-FP/VMX tests
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SRAM_RELAXED_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: adjust/relax SRAM timing parameters
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW369979</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW369979; Defer to DD2: [GRUB multi chiplet] l3_fir_reg_l3_hw_control_err L3 FIR bit 24 (mask control_err(2) by setting dial: err_rpt0_mask(2) to ON)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW378093</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW378093; Defer to DD2: edram_info_capture_cfg defaults to wrong value
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW288205_HW392168</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW288205 (P8 CQ) : L3 PF Hang fix. Change behavior of L3 Prefetch Back-off mechanism
                       HW392168 (P9 CQ) : This bug existed in P8 and was set to 0x4. The bug was not fixed
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406803</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: HW406803 : bug with calculating home region for LCO's using wrong bit44
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW392009</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: Enable work around for HW392009
      Auto Special Wakeup Disables [LMCR(12:13)]. Do not scan flush to 1s.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW377094</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW377094 L2 stq and ncu stq deadlock. g/ord_g causes artificial dependency between barrier and snptlbcmp in NCU
                while lfsr bits being reused in L2 stq causes entry to never be selected due to high priority ld-hit-st override.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW398015</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW398015 work around
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW396393</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW396393 rare TM fail condition.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW421347</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.1, Cumulus DD1.0 and older: HW421347 Scandalous Pie
      Core hang when going into re-cfg due to L3pref unfairness in L2 CIU between cores
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW374111</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW374111 snapshot doesn't work for domestic copy that hits the L2 cache. all 16 RC machines need to turn off clock gating
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW373819</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW373819 PEC SBCE could cause coherency problems when running in conjunction with copy/paste
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW370687</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW370687 xlate_addr_to_id clock gating bug
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW370692</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW370692 deadlock allowing snptlbcmp to pass around stcxf
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW394803</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW394803 - Fatal Venus: Critical section fail
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW370984</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW370984 - No wakeup from hypdbell to core 1 stopped in level 2 ESL=0 (SMT1 test)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW376874</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: HW376874
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW319315</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: mask TFAC parity errors (HW319315)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW385178</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW385178 - Force SMT4 mode for Stop 1 and 2 SPR loss
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393734</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW393734 - Stop2 hang workaround
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW396520</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW396520 (skip flushmode inhibit drop)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW388878</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW388878 (VCS)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW376651</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW376651
      Masks ahash parity error checker to avoid FiR when running EX1 only configs
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW389511</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable workarounds for HW389511 (PPM Reg collision)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW386013</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW386013 in FBC initfile
      pb_cfg_cent_opt3_mode must be configured as an smp to allow vas data
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407123</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1,DD2: enable workarounds for HW407123 in FBC initfile
      Slow down xlink cmd rate to work around broken single link credit dial
      that would have prevented rcmd overflows
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW424691</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus DDx.x: enable workarounds for HW424691 in FBC initfile
      Set alink token inits via scan for p9c to avoid serial scom conflict
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW409019</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.X: enable workarounds for HW409019 in FBC initfile
      Set single link credit workaround in numbus dd2.x, revert in p9c
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW418117</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.1 and below: enable workarounds for HW418117 in FBC initfile
      Cumulus DD1.0: enable workarounds for HW418117 in FBC initfile
      Disable lpc_ed to prevent lw.rty_other in p9n dd2.1 and below, and in p9c dd1.0
      revert in p9c dd1.1 and p9n dd2.2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NMMU_NDD1</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Configure NMMU for Nimbus DD1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NMMU_PWC_DIS_DD2</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      PWC disable for DD2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
    <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NMMU_PDE_EN_DD2</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enabling PDE fix for dd2 only, not needed going forward
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
    <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NMMU_NOT_ISS734</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      NMMU does not require application of issue734 fixes
      Issue734 exists on Nimbus dd2.1+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW378025</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW378025 in INT initfile
      Shared credits in ATX can only be updated when clockgate is disabled
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW930007</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW930007 in INT initfile
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW372116</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW372116 in INT initfile
      Remote Ld credit in PC should be set to zero to avoid ATX dropped commands
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW395947</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workarounds for HW395947 in INT initfile
      Workaround for relaxed write ordering causing SBT entry corruption
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408972</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1,DD2: enable workarounds for HW408972 in INT initfile
      Workaround for missing escalation bug with group interrupts
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
      <id>ATTR_CHIP_EC_FEATURE_NOT_HW414702</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Anything NOT Nimbus DD1: enable workarounds for HW414702 in INT initfile
      Workaround for clockgating bug with vpc at kill accessing bad data
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
      <id>ATTR_CHIP_EC_FEATURE_HW425038</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW425038 for INT initfile on Coral and Cumulus systems. Clockgate disable workaround for INT ARX timeout issue
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
      <id>ATTR_CHIP_EC_FEATURE_HW438727</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Anything NDD20+,CDD10+,ADD10+: Disable clockgating to allow correct
      errors to be reported in ODL c_err_rpt and other error capture.
      Axone see: HW481539
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
      <id>ATTR_CHIP_EC_FEATURE_HW426891</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW426891 for INT initfile on Coral, Cumulus, and Axone systems for
      ship mode
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW397255</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workaround for HW395947
      Disable cross-chip MC sync propogation
  </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PSI_HALF_SPEED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable half speed PSI link operation due to relaxed
      chip timing closure
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_LPC_RESET_GPIO</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: to do an LPC reset set the GPIO bits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PCIE_LOCK_PHASE_ROTATOR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1.00 only: lock phase rotator
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PCIE_DISABLE_FDDC</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1.01/DD1.02 only: disable DDC
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393297</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: run XBUS at reduced frequency (14.4 instead of 16) to
                based on HW393297
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SLOW_PCI_REF_CLOCK_ENABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: enable use of SS PLL to provide reduced frequency reference clock
                (94 MHz, instead of nominal 100 MHz) for PCI PLL
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SW387041</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: restrict NVLINK frequency to 20gbs
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW396230</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: set L3/NCU skip group scope via scan only
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_64B_STORE</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: don't set 64B store, dials didn't exist
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: don't set tlbie pacing, dials didn't exist
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408892</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1.X, DD2.0: Leave at default value of DIV_BY_10
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405880_LCO_IN_RETENTION</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1;  set to 0b000
      Numbus DD2+; set to 0b110
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW386657</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: set the optimal dial setups for LCO's via scan
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PRE_CACHE_DD21_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Not workaround or defect related. Just new dials to be set that are new in the caches for DD2.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_CP_ME</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable cp_me from the L3 for Nimbus DD1 and DD2.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_UNTUNED_LARX_STCX_PERF</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Larx/stcx dials are non performance tuned
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_INCREASE_JITTER</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus DD1.0+ : increase the L2 re-request jitter for larger systems
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NOT_HW409069</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2+: HW409069 load_larx protection not activated because of dtag_data_resp
      in hot lock load loop pvp test
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW383616</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workaround for HW383616
      Restrict GP/SP high water mark
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW384245</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: enable workaround for HW384245
      Restrict TL DOB limit
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW388874</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: n3_br_fure is non-scannable
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401184</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Silent Baron: TB and DEC SPRs stray apart with TOD enabled
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401249</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: mask EC local error from CC
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW397147</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Tired Grandpa -- CHKSW_DONT_PRIORITIZE_BRQ_MF
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399388</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Intense Skunk -- CS_LOW_POWER_PRIORITY_MODE_DIS
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399609</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Rich Starlight -- increase core hang limit to engage L2
                  random block gather LFSR
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW387254</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: IMA interval timer overcounts based on missing edge detect
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399919</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Major Queen
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401811</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Silly Plutonium
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW400898</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Hungry Shark
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW416161</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW416161 - incomplete DD2.1 fix requires additional workaround
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399765</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: NCU AMO load ordering error
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW402145</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Husky Dinosaur
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW393578</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Red Snow
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW403075</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Icy Sapphire
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399624</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Needy Kitten
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405851</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Distant Supernova
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW403766</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW403766
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405047</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW405047
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405602</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW405602
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405605</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW405605
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405865</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW405865
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406641</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW406641
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406972</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW406972
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407065</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407065
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PREVENT_Q0_HV_ACCESS</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable feature, preventing access to quadrant 0 in hypervisor mode when LPIDR != 0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MIXED_CORE_XLATE</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable mixed core (HPT/Radix) translation
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW437820</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW437820 - LSU clockgating issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407165</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407165
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
   <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407165_DD23</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407165 - Work around dial is renamed on Nimbus dd2.3 and Cumulus dd1.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408876</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW408876
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408917</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW408917
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408988</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW408988
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW409270</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW409270
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW431323</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW431323
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW409365</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW409365
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408891</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1.0 DD2.0
                  HW408891 - Recovery WAT
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW405021</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW405021
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW409194</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW409194
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407136</id>>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407136
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407385</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407385
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW410389</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW410389
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408901</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW408901
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW413799</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW413799 - ECC checking in SDKSMRF causes false failures
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414370</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414370 - TM atomicity failure
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415857</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415857 - Multiple marks can occur on CI ops - mask checker
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW422629</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW422629 - SETC clockgating issue with 2-for-1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW433125</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW433125
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414146</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414146 - Nimbus DD2.x; affects pmu events and sier(30)
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW422533</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW422533
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417630</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW417630 - NDD2.2 / CDD1.1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW421831</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW421831 - ltptr hang issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW421426</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW421426 - SMT2 prefetch issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW420860</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW420860 - Serialize lqarx
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES_RL</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Serialize indirect branches using risklevel
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Serialize indirect branches
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_LTPTR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Serialize LTPTR
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD11_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Cumulus DD1.1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD12_CDD13_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Cumulus DD1.2 and DD1.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD12_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Cumulus DD1.2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD13_NDD23_ADDXX_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Cumulus DD1.3, Nimbus DD2.3, and Axone DDX.X
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_ADDXX_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Axone DDX.X
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD11_CDD12_SECURITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Security settings for Cumulus DD1.1 and DD1.2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_COMPATIBILITY_MODE</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      True if the chip supports a compatibility mode
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_CDD13_COMPATIBILITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Used to revert Cumulus DD1.3 back to Cumulus DD1.2 inits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_NDD23_COMPATIBILITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Used to revert Nimbus DD2.3 back to Nimbus DD2.2 inits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_AXONE_PVR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Used to correct the PVR Version for Axone chips
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Core inits for enabling secure memory facility
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP_RL</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Core inits for enabling secure memory facility by risk level
      Only enabled on risk level 4 and 5 for Nimbus 2.3 and Cumulus 1.3
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD11_LOGIC</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Logic that only exist for NDD23+, CDD11+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD12_LOGIC</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Logic that only exist for NDD23+, CDD12+, ADD10+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD13_LOGIC</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Logic that only exist for NDD23+, CDD13+
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW439303</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW439303 - CDD1.2 only
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW426554</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW426554
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW435395</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      LTPTR issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DIS_PATTERN_CACHE_RL</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable Pattern Cache at risklevel=0 for Nimbus DD2.2 and Nimbus DD2.3 compatibility
      Also disable for all Nimbus DD2.3 native modes
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DIS_PATTERN_CACHE</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable Pattern Cache globally for Cumulus and Axone
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DIS_COUNT_CACHE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable Count Cache
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415883_HW471413</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415883, HW471413 - disable erat thread sharing
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW420948</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW420948 - SRQ/S2Q issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414597</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414597 - ISU clockgating bug concerning PMU events
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415480</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415480 - PMU Overflow exception issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415236</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415236 - ISU flush restore problem
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407187</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW407187 - Serialize mttb
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417577</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW417577 - PRQ clockgating issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW420130</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW420130 - Flush restore bug
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415988</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415988 - Ucon state machine is not currently POR for P9
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415114</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415114 - Disable zombie stores
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415013</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW415013 - IFU branch issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414384</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414384 - ISU recovery timeout workaround
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW413853</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW413853 - Issue with FPSCR sticky bits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW413917</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW413917 - Clock gating 241 issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414249</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414249 - Workaround for orphans causing SLB multihits
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414375</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414375 - DDIR false parity error issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414829</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414829 - Disable hotlocks
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW418789</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW418789 - Performance enhancement for balance flush
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW419618</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW419618 - Disable store data early wakeup
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW419642</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW419642 - ntc_plz should not reset PC hang pulse counter
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW418850</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW418850 - Disable LHL in SMT1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417829</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW417829 / HW423787 - Bad rfscv branch, NDD1.0,2.0,2.1, CDD1.0
      HW432070 Angry Reindeer - NDD2.2, CDD1.1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417242</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW417242 - Software hang on TM HB Full
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW417734</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW417734 - NTC_FLUSH_PENDING_IN_RAM during thread reconfig
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414871</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW414871 - TLBIE hang workaround
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW418738</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW418738 - S2Q clockgating issue
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW408629</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      HW408629
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW395939</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For DD1, VAS has no BAR disable bit.  Adding attribute to enable non zero
      init for the MMIO BARs. Issue HW395939
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9N_NX_DD1</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if dd1.
      Less than Nimbus ec 0x20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW403701</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Reduce rng pace from 2000->300 to work around grant unfairness
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406130</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Nimbus DD1: Reduce number of active DMA read requests down from 16->8
        to work around erat access count bug
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401552</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Nimbus DD1: Workaround clockgating bug with APC machines missing deassert
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW403585</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Treacherous Dolphin
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW402019_PIBRESET_DELAY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: Adding delay to wait for
      pibreset to complete
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NDD1_ABIST_PARALLEL</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: set ABIST engines to PARALLEL mode.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SETUP_BARS_NPU_DD1_ADDR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 only: Use the DD1 register addresses for the PHY0 BAR registers, PHY1 BAR registers, and MMIO BAR registers
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SETUP_BARS_NPU_AXONE_ADDR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Axone only: Use the Axone register addresses for the PHY0 BAR registers, PHY1 BAR registers, and MMIO BAR registers
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SKEWADJ_P9NDD1_INIT</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Inits for skewAdj in P9 ndd1. These are different from the default inits used starting in NDD2.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DCADJ_P9NDD1_INIT</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Inits for dutyCycleAdj in P9 ndd1. These are different from the default inits used starting in NDD2.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW397129</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Attribute for if we need a workaround for re-enabling the MC fastpath since on
      Nimbus DD1 is gets disabled.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_HW392781_RDARRAY_CLKGATE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Data integrity issue requires us to disable clockgate in read array for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW400075</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Addresses issue where MDI bit was getting wrong values with threadmill and transactional data resulting in coherency issues.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW398139</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Avoid powerbus early hangs by enabling prefetch drops to break out of fairness issue with prefetch ops
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW400932</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      ATAG info corruption on presp issue requires us to disable clockgate for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401780</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Need AMO caching disabled for multiple defects until Nimbus DD2.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406577</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Noise window disabled in DD1 because continually reocurring intermittent UE's can cause us to hang on refreshes.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW391162</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: spoof pb_init in cache contained mode
      Enables L2 checkers to monitor for transactions arbitrating
      to broadcast onto the fabric
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SCAN_SICR_TLBIE_QUIESCE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only: scan ON NCU_TLBIE_QUISCE fence
      for non-cache contained modes.  Flush state corrected in HW
      for future revisions
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_BLOCK_REG_WAKEUP_DISABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Nimbus DD2.2 / Cumulus DD1.1 - There is better fencing on the block wakeup signal
       from the core ppm, so the CME logic thinks it needs to block interrupts to PC.
       This sets an override to ignore the fenced off signal
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>


  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CXA_P9NDD1_SPY_NAMES</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Use Nimbus DD1 CXA spy register definition names
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_OBUS_P9NDD1_SPY_NAMES</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Use Nimbus DD1 Obus spy register definition names
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DDRPHY_P9NDD1_SPY_NAMES</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Use Nimbus DD1 DDR PHY spy register definition names
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MCA_P9NDD1_ASYNC</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Program MCA ECC logic to support Nimbus DD1
      asynchronus boundary crossing requirements
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_P9NDD1</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 core spy behavior qualifier
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW363246</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1 only -- PCI Nest stack error report registers cannot be cleared
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414759</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.0 only -- apply PCI PLL and VGA gain EDGEMOD workarounds
      to enable GEN4 operation
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414700</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.0, Cumulus DD1.0 -- set all UE FIRs to checkstop
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415692</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD[12] -- XB PLL lock reporting is unreliable
      based on unused x0 instance
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW410503</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cache Inject Throttle settings for Nimbus DD2.1 and Cumulus 1.0
      to help with remote cache inject performance.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <!-- Memory Section                                                       -->
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MCBIST_END_OF_RANK</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      MCBIST has a bug where it won't detect the end of a rank properly for
      a 1R DIMM during super-fast read.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_WAT_DEBUG_ATTN</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      WAT Debug Attention work-around for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_NIMBUS_EC_LESS_THAN_TWO_OH</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Attribute used only for memory subsystem procedures. Tells us whether
      the chip EC we're running on is less than 2.0 and we're on a Nimbus
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_WR_VREF</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In DD1 Nimbus in the WR VREF algorithm, certain work-arounds are needed
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DCD_WORKAROUND</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In DD1 Nimbus, the sofware DCD calibration needs to be run, as it does not exist in HW
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_DQS_POLARITY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Monza DDR port 2, one pair of DQS P/N is swapped polarity.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      VREF DAC work-around for Nimbus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_TRAINING_BAD_BITS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Nimbus pre DD1.02 we want to pass DDR training if we see 'correctable'
      errors. This isn't the case for post-DD1.02 where we want to pass/fail
      training based on the results from the PHY itself
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_CHECK_DISABLE_HW_VREF_CAL</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In below DD2 Nimbus, the HW VREF calibration needs to be checked against the chip subversion to see if it can be run.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_RUN_RD_CTR_WORKAROUND</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In below DD2 Nimbus, a workaround after read centering might need to be run.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_ODT_CONFIG</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Nimbus pre DD2.** we need to swap ODT2 and ODT3 values in the
      DDRPHY_SEQ_ODT_RD/WR_CONFIG registers due to a PHY erratum.
      Post DD2.** will have a hardware enabled fix for this (HW389360).
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_BLUE_WATERFALL_ADJUST</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In DD1.** Nimbus, the blue waterfall can calibrate to an incorrect value. In DD2 Nimbus,
      This isn't the case as the HW will not allow this calibration value
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_RED_WATERFALL_ADJUST</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        In DD2.** Nimbus, We adjust the red waterfall to account for low VDN settings.
        We move the waterfall forward by one
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_CHECK_DIABLE_RD_VREF_CAL_VREFSENSE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      In below DD2 Nimbus, the RD VREF cal VREF sense needs to be checked against the chip subversion to see if it should be run.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_RUN_DQS_LOOP</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        In DD1.** Nimbus, if we get a DQS fail from DQS_ALIGN in draminit_training,
        we rerun DQS_ALIGN for the failing bit for a set number of times or until it passed
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MSS_PERIODICS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Nimbus DD1.** turn off periodics by default (zqcal and memcal).
      For Nimbus DD2.** it will be attribute driven without any restrictions.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <!-- End Memory Section                                                   -->
  <!-- ******************************************************************** -->

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DISABLE_NPU_FREEZE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      True if NPU freeze (unit checkstop) should be disabled
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW411637</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Mask INT SUE FIR bit for Nimbus DD2.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NOT_HW399276</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      True if chip does not comtain HW399276 defect
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

<attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407064</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable DP16 delay line tap point for DD2 and beyond
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW368644</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Register init for nimbus DD1 that is not necessary for DD2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW384794</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Workaround for defect where clock enables to PHY were incorrectly driven
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW375732</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Workaround for Data mismatch discovered by Geyzer at certain async frequency ratios
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW411339</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Workaround for supporting memory to nest frequency ratios greater than 1.33
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_RNG_ADAPTEST_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      The Random number generator has different settings in dd1 and dd2
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW389045</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Update the TSEL shadow copy by scanning as it't not connected to the SCOM reg.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW401131</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Since amo cache clean line disabled for dd2, fix for HW401131 must also be disabled.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_RING_SAVE_MPIPL</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      For Nimbus DD2 we no longer need a workaround for Ring Save in MPIPL
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Program MCA ECC logic to support Cumulus DD1.1
      asynchronus boundary crossing requirements
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Program MCU to support standard MDI behavior for Cumulus DD1.1
      allowing for MDI to be 0 in the system for local operations.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW430546_P9UDD10_WARLIKE_PARASITE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Reduce available channel tags for shadow machine usage to
      prevent tag overrun due to pathalogical bug.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW404176_ASSERT_SCAN_CLK</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus only: MC chiplet requires scan clock in even cycle instead of odd
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW406337</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus and Axone only: dropping MC chiplet fence during arrayinit
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW399466</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable fix for HW399466 where all read data for amo smi ops is sent to rmw buffer.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW418091</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Adjust FRTL latency overflow check for HW418091
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW355538</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable fix for HW355538 that enables write MDI to 1 for retry UE.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Not workaround or defect related. Just new dials to be set that are new in memory controller for DD2.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_WOF_NOT_SUPPORTED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Work Load Optimized Frequency non-support in manufacturing.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_VDM_NOT_SUPPORTED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Voltage Droop Monitor non-support in manufacturing.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_VDM_POUNDW_SUPPRESS_ERROR</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Voltage Droop Monitors errors in #W should suppress error logs to ride
      through VDM disablement.  Applies to Turbo Large Threshold check only.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
   <!-- ******************************************************************** -->
    <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DD1_ANALOG</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 update : Scan init VDM and IVRM latch workarounds. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DD1_DPLL_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 update : Scan init DPL Jump Values (SCOMMABLE in DD2). True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9N_INT_DD10</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Common Attribute for INT DD10 spys
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9N_INT_DD20</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Common Attribute for INT DD20 spys
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9N_INT_DD21</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Common Attribute for INT DD21+ spys
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DD1_FBC_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      DD1 FBC setting differs from DD2, ex. lo_limit adjustment. True if:
      Nimbus EC less than 20
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_AXONE_FBC_SETTINGS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Fabric settings that are in Axone only
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW412371</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Workaround for HW412371 wrong lane getting trained in 11 lane mode. fixed in p9c dd1.1
      Cumulus EC greater than 10
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if spy name has usage only in P9C.
      Spy Name of Cumulus; Also used for cumulus only
      oscswitch settings.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SMF_SUPPORTED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if secure memory is supported in chip design.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9A_LOGIC_ONLY</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if spy name has usage only in P9A.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9A_STOPCLOCKS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Returns true if stopclocks function usage is for Axone chip
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_IOF0PLL_INITF</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus and Axone only: IOF0PLL initf
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_IOO1_IOO2_PLL_INITF</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus and Axone only: IOO1 and IOO2 PLL initf
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EXTRACT_SBE_RC_P9NDD1_CHIPS</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Use to detect Nimbus DD1 chips in p9_extract_sbe_rc procedure
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_NO_GPTR_SUPPORT_VIA_MVPD</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        GPTR support through MVPD is available in Nimbus DD2 and Cumulus and
        will NOT be if Nimbus DD1.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
 <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_POUNDV_VALIDATE_DISABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Disables the checking of #V validity by p9_pstate_parameter_block.
        If not disable, invalid #V will fail to IPL.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW415945</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Magenta Oatmeal -- disable ECC bypass
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_OBUS_HW419305</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      IO setting updates from lab findings
      Settings invalid for Nim DD1
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW410625</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1/DD2: NPU issues bkill instead of bkill_inc - misses shared copy in multi-group config.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
</attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW426816</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.0-DD2.2/Cumulus DD1.0-DD1.1: CQ_SM allocation: Simultaneous free+allocate at the low water mark causes incorrect increment of reserved counter.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
 <!-- ******************************************************************** -->
 <!-- NOTE: This attribute is used in an initfile to qualify the contents
            of a GPTR ring. There is special processing in place to move the
             GPTR content into the OVERLAYS section for Nimbus DD2+ and
             Cumulus systems, due to this additional special processing
             two attributes are required. DD2+ GPTR ring content should
             be placed in p9.xx.gptr.scan.overlays.initfiles -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407330_DD2</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Nimbus DD1/DD2: State Latches for Atomic CAS during ntl fence don't get reset.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>

 <!-- ******************************************************************** -->
 <!-- NOTE: This attribute is used in an initfile to qualify the contents
            of a GPTR ring. There is special processing in place to move the
             GPTR content into the OVERLAYS section for Nimbus DD2+ and
             Cumulus systems, due to this additional special processing
             two attributes are required. DD1 GPTR ring content should
             be placed in p9.xx.gptr.scan.initfiles -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW407330_DD1</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1/DD2: State Latches for Atomic CAS during ntl fence don't get reset.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
 <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW364887</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Data before Rcmd causes state machine to get stuck in wait-for-data state.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW372457</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD1: Probe Blocked Forever
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW419022</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Cumulus DD1: Use alternate training sequence to establish
      OBUS fabric DL layer to avoid HW419022
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW404391_SCAN</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush
      state of selected latches in NVDL and PHY logic
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW404391_SCAN_OB12</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush
      state of selected latches in NVDL and PHY logic
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW404391_SCOM</id>>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Nimbus DD2.0: Workaround glxmux xstate issue by applying SCOM sequence
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE</id>>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Defines chip HW support for extended addressing mode
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423589_OPTION2</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Enable extended addressing mode to workaround MCD
      coherency issue HW423589.  EC update will prevent application on
      any system.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0xAF</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW423589_OPTION1</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable MCD to workaround coherency issue HW423589
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
   </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW437173</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Limit NPU DCP0 credits advertised to an OpenCAPI AFU to 126.
    </description>
    <chipEcFeature>
      <falseIfMatch/>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
   </attribute>
 <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW419021</id>>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Disable read data delay for Cumulus DD1.0
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW422471</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Used in conjunction with ATTR_IO_O_CHANNEL_TYPE
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW422471_HW446964</id>
    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Used in conjunction with ATTR_IO_O_CHANNEL_TYPE
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x21</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_P9A_SBE_REGION</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      New Region came in TP for Axone chip
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW414958</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Disabling speculative dcbf* ttypes.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TLBIE_WAT</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       Enable TLBIE WAT
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_TLBIE_WAT_5</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
       HW483672: Enable TLBIE WAT (version 5); fixes unintended flushing

       Dials needed in addition to the original tlbie wat implementation
       to fix unintended flushing behavior induced by the original wat.
       Apply to native Cumulus DD1.3 risk levels only.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW440920</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Revert to ordered ("p8") TLBIE mode, disable NMMU snoop of TLBIE.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW440920_DISABLE_FIX</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     HW fixes for HW440920 are present in chip logic, but
     revert to ordered ("p8") TLBIE mode, disable NMMU snoop of TLBIE.
     disable nest TLBIE changes
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW446453</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     NCU HW contains design change to address HW446453
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW477626</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     HW477626 Dangerous Elk: Enable L2 reservation protection for performance
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x12</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SS_FPLL_SPREAD</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Generate 0.2% down spread in SS Filter PLL
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SW430383</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Revert PCI store thread based ordering mode for SW430383
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x11</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x23</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_AXONE_SW430383</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Revert PCI store thread based ordering mode for SW430383
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_CORE_RECOVERY_WA</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Unmask L2 FIR bit 39 to serve as PRD signalling mechanism
     for core recovery
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x20</value>
          <test>LESS_THAN</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SW432374</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Configure pervasive FIR setup to expose PCI osc switch events
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SW442771</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Adjust scan flush state of NV DL logic to deassert recal abort
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Disable RMW10 Hangbuster workaround in dd1.3 because of hardware fix
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW467590</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Enable MC WAT to inject stalls into Read Queue when Atomic Read Modify Write
        Fetch operations request read buffer access. This produces a gap to allow the  
        operation to complete.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
    </attribute> 
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW461448</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Enable MC WAT to hold off incoming commands to the memory controller after
        a certain fullness level. Currently configured to hold off for 75 counts
        after reaching 16 entries in the write buffers. This will allow existing
        entries in queue to make forward progress before commiting more into the
        queues.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Use TOD to synchronize SS filter PLL spreading across system
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <!-- essentially... never, since synchronous spread start is broken -->
          <value>0xAF</value>
          <test>EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW403111</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     mtspr URMOR, rX will add the PPC instruction text to the Rx value
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x22</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x13</value>
          <test>LESS_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_US_TEMPLATES_0159</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     The processor only supports upstream OMI tempaltes 0, 1, 5, and 9.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_DS_TEMPLATES_0147</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     The processor only supports downstream OMI tempaltes 0, 1, 4, and 7.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_PIBMEM_REPAIR_AXONE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Defines the ec level where pibmem repair is supported for Axone.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MEMORY_DIRECT_ATTACHED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     The processor supports direct attached memory via DDR interface
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_NIMBUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_MEMORY_DMI_ATTACHED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     The processor supports memory attached via Centaur memory buffer chip.
     DMI connection links processor and Centaur chips.
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_CUMULUS</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_OMI</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     Chip uses OpenCAPI Memory Interface
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
  <!-- ******************************************************************** -->
  <attribute>
    <id>ATTR_CHIP_EC_FEATURE_HW476692</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
     HW476692
    </description>
    <chipEcFeature>
      <chip>
        <name>ENUM_ATTR_NAME_AXONE</name>
        <ec>
          <value>0x10</value>
          <test>GREATER_THAN_OR_EQUAL</test>
        </ec>
      </chip>
    </chipEcFeature>
  </attribute>
</attributes>