Add A bus initialisation registers

There are around unique 200 indirect registers used by A bus
procedures. As in indirect registers, we only check lower 32 bits
adding one register only. All other registers differ in upper 32
bits.

Change-Id: Ia6c629f33b8ed96a70c835287ed1e1f8a70f2232
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60199
Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60203
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/security/p9_security_white_black_list.csv

@@ -953,3 +953,4 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U
 ,TP,0x0006C738,0x00,HB,AVSBus O2SWD  Bus 1 Bridge B,p9_setup_evid.C,write_whitelist,
 ,CACHE,0x100F0151,0x10-0x16,HBFW,QPPM DPLL Frequency Control Register,p9_setup_evid.C,write_whitelist,
 ,CACHE,0x100F01B6,0x10-0x16,HBFW,QPPM VDM Config Register,p9_setup_evid.C,write_whitelist,
+,,0x8002200f09010c3f,0x09-0x0C,HWSV,,p9_io_obus_dccal and other O bus procedures,write_whitelist,