Add PHY RC class, update setup cal for 2D wc/rc

Change-Id: I18cfd506cdde8730f88e892af7cd97d93fb74434
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23561
Tested-by: Jenkins Server
Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com>
Reviewed-by: Andre A. Marin <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69755
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -2011,7 +2011,6 @@
 
     <attribute>
         <id>ATTR_EFF_DRAM_BL</id>
-        <!-- P8 MBA level information -->
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             Burst Length.
@@ -2027,8 +2026,7 @@
         <writeable/>
         <odmVisable/>
         <odmChangeable/>
-        <array>2 2</array>
-        <mssAccessor>PORT</mssAccessor>
+        <array>2</array>
         <mssAccessorName>eff_dram_burst_length</mssAccessorName>
     </attribute>
 
@@ -7291,4 +7289,17 @@
         <writeable/>
         <mssAccessorName>eff_dram_rtt_wr</mssAccessorName>
     </attribute>
+
+<attribute>
+    <id>ATTR_VPD_GPO</id>
+    <targetType>TARGET_TYPE_MCS</targetType>
+    <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM
+      associated with port A.  Bytes 125 for port B, 189 for port C and 253 for port D</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+    <writeable/>
+    <mssAccessorName>vpd_gpo</mssAccessorName>
+</attribute>
 </attributes>