p9_setup_clock_term: Apply tweak bits, put oscswitches into reset

Put the oscswitches into reset by deasserting PGOOD before we turn on
clocks, to make sure they fall into a reliable defined state when we
assert PGOOD during p9_clock_test.

Update the set values of root controls with preliminary sys oscswitch
tweak bits; to be refined after full redundant oscillator bringup.

Refactor some code to make procedure more readable.

Change-Id: Ib634d135b1932c2b7d5d88ba1689c5e3a20a9c7e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58826
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59053
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/hwp/perv/p9_setup_clock_term.H

@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -47,13 +47,15 @@ namespace p9SetupClockTerm
 {
 enum P9_SETUP_CLOCK_TERM_Public_Constants
 {
-    OSCSWITCH_RC3 = 0x0080C000,
-    OSCSWITCH_RC4 = 0x0,
     DISABLE_WRITE_PROTECTION = 0x4453FFFF,
+    P9N_OSCSWITCH_RC3 = 0x0080C000,
+    P9C_OSCSWITCH_RC3_BASE = 0x09010000,
     P9C_OSCSWITCH_RC3_BOTHSRC0 = 0x00009000,
     P9C_OSCSWITCH_RC3_BOTHSRC1 = 0x00006000,
-    P9C_OSCSWITCH_RC3_SRC0 = 0x0000C000,
-    P9C_OSCSWITCH_RC3_SRC1 = 0x00003000
+    P9C_OSCSWITCH_RC3_SRC0 =     0x0000C000,
+    P9C_OSCSWITCH_RC3_SRC1 =     0x00003000,
+    OSCSWITCH_RC4 = 0x80100000,
+    OSCSWITCH_RC5 = 0x0030, /* Lower half of RC5 */
 };
 }