Adds explorer post-draminit bad bits processing

Change-Id: I60a76365e95eab18a24075ac20a24fb2754c6b00 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72511 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80996 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: RAJA DAS <rajadas2@in.ibm.com>
open-power · Jul 25, 2019 · 1fac7c3 · 1fac7c3
1 parent 41a5e25
commit 1fac7c3
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diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
@@ -50,6 +50,7 @@ enum sizes
 {
     MAX_DIMM_PER_PORT = 2,
     MAX_RANK_PER_DIMM = 4,
+    MAX_BITS_PER_PORT = 80,
 };
 
 ///

diff --git a/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml b/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml
@@ -24,6 +24,18 @@
 <!-- IBM_PROLOG_END_TAG                                                     -->
 <hwpErrors>
 
+  <hwpError>
+    <rc>RC_MSS_EXP_DRAMINIT_BAD_NUM_RANKS</rc>
+    <description>Bad number of ranks were passed in the bad bits functionality</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>NUM_RANKS</ffdc>
+    <ffdc>MAX_RANKS</ffdc>
+    <callout>
+      <target>CODE</target>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
   <hwpError>
     <rc>RC_MSS_EXP_DRAMINIT_UNSUPPORTED_DIMM_TYPE</rc>
     <description>Unsupported DIMM type encountered in draminit_training procedure</description>

diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
@@ -282,6 +282,7 @@ enum nibble_mask
 };
 
 
+
 ///
 /// @brief Trait classes for proc_type - AXONE specialization
 ///
@@ -296,7 +297,6 @@ struct procTraits<proc_type::AXONE>
     };
 };
 
-
 }// mss
 
 #endif