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Get capabilities spec sync
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Sync with fifo spec - 1.5c
PSU spec - 0.9e

Change-Id: I16048b0a52c47da5b713cbbc28d25039114d9a30
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61251
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
(cherry picked from commit a0a932369074e874a14685bda3548adf6dc8ac28)
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59929
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@Shakeebbk @sgupta2m
Shakeebbk authored and sgupta2m committed Jul 24, 2018
1 parent 06f2b04 commit 2567f8f
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Showing 6 changed files with 134 additions and 67 deletions.
10 changes: 10 additions & 0 deletions src/sbefw/app/common/sbecmdgeneric.C
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,16 @@ sbeCapabilityRespMsg::sbeCapabilityRespMsg() : capability{}
{
buildTag[idx] = hdr->iv_buildTag[idx];
}

capability[GENERIC_CAPABILTITY_START_IDX] =
HWP_FFDC_COLLECTION_SUPPPORTED |
SBE_FFDC_COLLECTION_SUPPPORTED |
ADDRESS_BLACKLISTING_SUPPPORTED |
FIFO_RESET_SUPPPORTED |
HOST_CMD_INTERFACE_SUPPORTED |
SP_LESS_MPIPL_SUPPORTED;
capability[GENERIC_CAPABILTITY_START_IDX + 1] =
RESERVED_GENERIC_CAPABILITIES;
}
// Functions
//----------------------------------------------------------------------------
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75 changes: 58 additions & 17 deletions src/sbefw/app/power/sbecmdgeneric.C
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Original file line number Diff line number Diff line change
Expand Up @@ -52,32 +52,45 @@ using namespace fapi2;

void updatePsuCapabilities(uint32_t * capability)
{
capability[PSU_GENERIC_CAPABILTITY_START_IDX] =
PSU_HWP_FFDC_COLLECTION_SUPPORTED |
PSU_SBE_FFDC_COLLECTION_SUPPORTED |
PSU_ADDRESS_BLACKLIST_SUPPORTED |
PSU_HOST_COMMAND_INTERFACE_SUPPORTED;

capability[PSU_CORE_CONTROL_CAPABILITY_START_IDX] =
PSU_CONTROL_DEADMAN_LOOP;
capability[PSU_CORE_CONTROL_CAPABILITY_START_IDX+1] =
PSU_RESERVED_1;

capability[PSU_SCOM_CAPABILITY_START_IDX] =
PSU_DEFAULT_CAPABILITY_D2;
capability[PSU_SCOM_CAPABILITY_START_IDX+1] =
PSU_RESERVED_2;

capability[PSU_RING_CAPABILITY_START_IDX] =
PSU_PUT_RING_FROM_IMAGE_SUPPORTED;
capability[PSU_RING_CAPABILITY_START_IDX+1] =
PSU_RESERVED_3;

capability[PSU_TIMER_CAPABILITY_START_IDX] =
PSU_CONTROL_TIMER_SUPPORTED;
capability[PSU_TIMER_CAPABILITY_START_IDX+1] =
PSU_RESERVED_4;

capability[PSU_MPIPL_CAPABILITY_START_IDX] =
PSU_DEFAULT_CAPABILITY_D5;
capability[PSU_MPIPL_CAPABILITY_START_IDX+1] =
PSU_RESERVED_5;

capability[PSU_SECURITY_CONTROL_CAPABILITY_START_IDX] =
PSU_UNSECURE_MEM_REGION_SUPPORTED;
capability[PSU_SECURITY_CONTROL_CAPABILITY_START_IDX+1] =
PSU_RESERVED_6;

capability[PSU_GENERIC_CHIPOP_CAPABILITY_START_IDX] =
PSU_GET_SBE_FFDC_SUPPPORTED |
PSU_GET_SBE_CAPABILITIES_SUPPPORTED |
PSU_READ_SBE_SEEPROM_SUPPORTED |
PSU_SET_FFDC_ADDRESS_SUPPORTED |
PSU_QUISCE_SUPPORTED |
PSU_SET_SYSTEM_FABRIC_ID_MAP_SUPPORTED |
PSU_STASH_MPIPL_CONFIG_SUPPORTED;
capability[PSU_GENERIC_CHIPOP_CAPABILITY_START_IDX+1] =
PSU_RESERVED_7;

}
void updateFifoCapabilities(uint32_t * capability)
Expand All @@ -87,34 +100,62 @@ void updateFifoCapabilities(uint32_t * capability)
capability[IPL_CAPABILITY_START_IDX] =
EXECUTE_ISTEP_SUPPPORTED |
SUSPEND_IO_SUPPPORTED;
capability[IPL_CAPABILITY_START_IDX+1] =
RESERVED_A1_CAPABILITIES;

capability[SCOM_CAPABILITY_START_IDX] =
GET_SCOM_SUPPPORTED |
PUT_SCOM_SUPPPORTED |
MODIFY_SCOM_SUPPPORTED |
PUT_SCOM_UNDER_MASK_SUPPPORTED ;
capability[SCOM_CAPABILITY_START_IDX+1] =
RESERVED_A2_CAPABILITIES;

capability[GENERIC_CHIPOP_CAPABILITY_START_IDX] =
GET_SBE_FFDC_SUPPPORTED |
GET_SBE_CAPABILITIES_SUPPPORTED|
SBE_QUIESCE;
capability[RING_CAPABILITY_START_IDX] =
GET_RING_SUPPPORTED |
PUT_RING_SUPPPORTED |
PUT_RING_FROM_IMAGE_SUPPPORTED;
capability[RING_CAPABILITY_START_IDX+1] =
RESERVED_A3_CAPABILITIES;

capability[MEMORY_CAPABILITY_START_IDX] =
GET_MEMORY_SUPPPORTED |
PUT_MEMORY_SUPPPORTED |
GET_SRAM_OCC_SUPPPORTED |
PUT_SRAM_OCC_SUPPPORTED;

capability[INSTRUCTION_CTRL_CAPABILITY_START_IDX] =
CONTROL_INSTRUCTIONS_SUPPPORTED;
capability[MEMORY_CAPABILITY_START_IDX+1] =
RESERVED_A4_CAPABILITIES;

capability[REGISTER_CAPABILITY_START_IDX] =
GET_REGISTER_SUPPPORTED |
PUT_REGISTER_SUPPPORTED ;
capability[REGISTER_CAPABILITY_START_IDX+1] =
RESERVED_A5_CAPABILITIES;

capability[ARRAY_CAPABILITY_START_IDX] =
CONTROL_FAST_ARRAY_SUPPPORTED |
CONTROL_TRACE_ARRAY_SUPPPORTED;
capability[ARRAY_CAPABILITY_START_IDX+1] =
RESERVED_A6_CAPABILITIES;

capability[INSTRUCTION_CTRL_CAPABILITY_START_IDX] =
CONTROL_INSTRUCTIONS_SUPPPORTED;
capability[INSTRUCTION_CTRL_CAPABILITY_START_IDX+1] =
RESERVED_A7_CAPABILITIES;

capability[GENERIC_CHIPOP_CAPABILITY_START_IDX] =
GET_SBE_FFDC_SUPPPORTED |
SBE_QUIESCE;
capability[GENERIC_CHIPOP_CAPABILITY_START_IDX+1] =
RESERVED_A8_CAPABILITIES;

capability[MPIPL_CAPABILITY_START_IDX] =
ENTER_MPIPL_SUPPORTED |
CONTINUE_MPIPL_SUPPORTED |
STOP_CLOCKS_MPIPL_SUPPORTED;
capability[MPIPL_CAPABILITY_START_IDX+1] =
RESERVED_A9_CAPABILITIES;

capability[RING_CAPABILITY_START_IDX] =
GET_RING_SUPPPORTED |
PUT_RING_SUPPPORTED;
}
#endif //__SBEFW_SEEPROM__

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24 changes: 9 additions & 15 deletions src/sbefw/core/sbe_host_intf.H
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Expand Up @@ -159,38 +159,32 @@ enum PSU_CAPABILITIES_INDEX
*/
enum PSU_CAPABILITIES
{
// Capabilities 0, 1
PSU_HWP_FFDC_COLLECTION_SUPPORTED = 0xD0000001,
PSU_SBE_FFDC_COLLECTION_SUPPORTED = 0xD0000002,
PSU_ADDRESS_BLACKLIST_SUPPORTED = 0xD0000004,
PSU_HOST_COMMAND_INTERFACE_SUPPORTED = 0xD0000008,
PSU_SP_LESS_MPIPL_SUPPORTED = 0xD0000010,
PSU_RESERVED_0 = 0xD0000000,

// Capabilities 2, 3
PSU_CONTROL_DEADMAN_LOOP = 0xD1000001,
PSU_RESERVED_1 = 0xD1000000,
PSU_RESERVED_1 = 0xD1800000,

// Capabilities 4, 5
PSU_DEFAULT_CAPABILITY_D2 = 0xD2000000,
PSU_EXECUTE_MULTI_SCOM_SUPPORTED = 0xD2000001,
PSU_RESERVED_2 = 0xD2000000,
PSU_RESERVED_2 = 0xD2800000,

// Capabilites 6, 7
PSU_PUT_RING_FROM_IMAGE_SUPPORTED = 0xD3000001,
PSU_RESERVED_3 = 0xD3000000,
PSU_RESERVED_3 = 0xD3800000,

// Capabilities 8, 9
PSU_CONTROL_TIMER_SUPPORTED = 0xD4000001,
PSU_RESERVED_4 = 0xD4000000,
PSU_RESERVED_4 = 0xD4800000,

// Capabilities 10, 11
PSU_DEFAULT_CAPABILITY_D5 = 0xD5000000,
PSU_GET_ARCHITECTED_REG_SUPPORTED = 0xD5000001,
PSU_CLEAR_ARCHITECTED_REG_SUPPORTED = 0xD5000002,
PSU_RESERVED_5 = 0xD5000000,
PSU_RESERVED_5 = 0xD5800000,

// Capabilities 12, 13
PSU_UNSECURE_MEM_REGION_SUPPORTED = 0xD6000001,
PSU_RESERVED_6 = 0xD6000000,
PSU_RESERVED_6 = 0xD6800000,

// Capabilities 14, 15
PSU_GET_SBE_FFDC_SUPPPORTED = 0xD7000001,
Expand All @@ -200,7 +194,7 @@ enum PSU_CAPABILITIES
PSU_QUISCE_SUPPORTED = 0xD7000010,
PSU_SET_SYSTEM_FABRIC_ID_MAP_SUPPORTED = 0xD7000020,
PSU_STASH_MPIPL_CONFIG_SUPPORTED = 0xD7000040,
PSU_RESERVED_7 = 0xD7000000,
PSU_RESERVED_7 = 0xD7800000,
};

#endif // __SBEFW_SBE_HOST_INTF_H
38 changes: 30 additions & 8 deletions src/sbefw/core/sbe_sp_intf.H
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Original file line number Diff line number Diff line change
Expand Up @@ -255,6 +255,7 @@ enum
ARRAY_CAPABILITY_START_IDX = GENERIC_CAPABILTITY_START_IDX + 12,
INSTRUCTION_CTRL_CAPABILITY_START_IDX = GENERIC_CAPABILTITY_START_IDX + 14,
GENERIC_CHIPOP_CAPABILITY_START_IDX = GENERIC_CAPABILTITY_START_IDX + 16,
MPIPL_CAPABILITY_START_IDX = GENERIC_CAPABILTITY_START_IDX + 18,

// Keep in sync with the spec
CAPABILITIES_LAST_INDEX_FIFO = 19,
Expand All @@ -265,36 +266,57 @@ enum
*/
enum
{
HWP_FFDC_COLLECTION_SUPPPORTED = 0x00000001,
SBE_FFDC_COLLECTION_SUPPPORTED = 0x00000002,
ADDRESS_BLACKLISTING_SUPPPORTED = 0x00000004,
FIFO_RESET_SUPPPORTED = 0x00000008,
HWP_FFDC_COLLECTION_SUPPPORTED = 0xC0000001,
SBE_FFDC_COLLECTION_SUPPPORTED = 0xC0000002,
ADDRESS_BLACKLISTING_SUPPPORTED = 0xC0000004,
FIFO_RESET_SUPPPORTED = 0xC0000008,
HOST_CMD_INTERFACE_SUPPORTED = 0xC0000010,
SP_LESS_MPIPL_SUPPORTED = 0xC0000020,
RESERVED_GENERIC_CAPABILITIES = 0xC8000000,

EXECUTE_ISTEP_SUPPPORTED = 0xA1000001,
SUSPEND_IO_SUPPPORTED = 0xA1000002,
RESERVED_A1_CAPABILITIES = 0xA1800000,

GET_SCOM_SUPPPORTED = 0xA2000001,
PUT_SCOM_SUPPPORTED = 0xA2000002,
MODIFY_SCOM_SUPPPORTED = 0xA2000004,
PUT_SCOM_UNDER_MASK_SUPPPORTED = 0xA2000008,
MULTI_SCOM_SUPPPORTED = 0xA2000010,
RESERVED_A2_CAPABILITIES = 0xA2800000,

GET_RING_SUPPPORTED = 0xA3000001,
PUT_RING_SUPPPORTED = 0xA3000002,
PUT_RING_FROM_IMAGE_SUPPPORTED = 0xA3000004,
RESERVED_A3_CAPABILITIES = 0xA3800000,

GET_MEMORY_SUPPPORTED = 0xA4000001,
PUT_MEMORY_SUPPPORTED = 0xA4000002,
GET_SRAM_OCC_SUPPPORTED = 0xA4000004,
PUT_SRAM_OCC_SUPPPORTED = 0xA4000008,
GET_SRAM_CME_SUPPPORTED = 0xA4000010,
PUT_SRAM_CME_SUPPPORTED = 0xA4000020,
RESERVED_A4_CAPABILITIES = 0xA4800000,

GET_REGISTER_SUPPPORTED = 0xA5000001,
PUT_REGISTER_SUPPPORTED = 0xA5000002,
RESERVED_A5_CAPABILITIES = 0xA5800000,

CONTROL_FAST_ARRAY_SUPPPORTED = 0xA6000001,
CONTROL_TRACE_ARRAY_SUPPPORTED = 0xA6000002,
RESERVED_A6_CAPABILITIES = 0xA6800000,

CONTROL_INSTRUCTIONS_SUPPPORTED = 0xA7000001,
RESERVED_A7_CAPABILITIES = 0xA7800000,

GET_SBE_FFDC_SUPPPORTED = 0xA8000001,
GET_SBE_CAPABILITIES_SUPPPORTED = 0xA8000002,
GET_SBE_FREQUENCIES_SUPPPORTED = 0xA8000004,
GET_SBE_STATE_SUPPPORTED = 0xA8000008,
SBE_QUIESCE = 0xA8000010,
SBE_QUIESCE = 0xA8000002,
RESERVED_A8_CAPABILITIES = 0xA8800000,

ENTER_MPIPL_SUPPORTED = 0xA9000001,
CONTINUE_MPIPL_SUPPORTED = 0xA9000002,
STOP_CLOCKS_MPIPL_SUPPORTED = 0xA9000004,
RESERVED_A9_CAPABILITIES = 0xA9800000,
};

/**
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30 changes: 15 additions & 15 deletions src/test/testcases/testGetCapabilities.py
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Expand Up @@ -30,28 +30,28 @@
TESTDATA = [0,0,0,2,
0,0,0xA8,0x02 ]

EXPDATA1 = [0x0,0x0,0x0,0x0,
0x0,0x0,0x0,0x0,
EXPDATA1 = [0xC0,0x0,0x00,0x3F,
0xC8,0x0,0x0,0x0,
0xa1,0x0,0x0,0x03, # istep/suspendio
0x0,0x0,0x0,0x0,
0xa1,0x80,0x0,0x0,
0xa2,0x0,0x0,0x0f, #getscom/putscom/modifyscom/putscomundermask
0x0,0x0,0x0,0x0,
0xa3,0x0,0x0,0x3, #getring/putring
0x00,0x0,0x0,0x0];
0xa2,0x80,0x0,0x0,
0xa3,0x0,0x0,0x7, #getring/putring
0xa3,0x80,0x0,0x0];

EXPDATA2 = [0xa4,0x0,0x0,0x0f, #GetMemPba/PutMemPba/GetSramOcc/PutSramOcc
0x0,0x0,0x0,0x0,
0xa4,0x80,0x0,0x0,
0xa5,0x0,0x0,0x03, #GetReg/PutReg
0x0,0x0,0x0,0x0,
0x0,0x0,0x0,0x0,
0x0,0x0,0x0,0x0,
0xa5,0x80,0x0,0x0,
0xa6,0x0,0x0,0x03,
0xa6,0x80,0x0,0x0,
0xa7,0x0,0x0,0x1, # control Instruction
0x00,0x0,0x0,0x0];
0xa7,0x80,0x0,0x0];

EXPDATA3 = [0xa8,0x0,0x0,0x13, #getcapability/getSbeFFDC/quiesce
0x0,0x0,0x0,0x0,
0, 0, 0, 0, #MPIPL related
0, 0, 0, 0,
EXPDATA3 = [0xa8,0x0,0x0,0x03, #getcapability/getSbeFFDC/quiesce
0xa8,0x80,0x0,0x0,
0xa9, 0, 0, 0x7, #MPIPL related
0xa9, 0x80, 0, 0,
0xc0,0xde,0xa8,0x02,
0x0,0x0,0x0,0x0,
0x00,0x0,0x0,0x3];
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24 changes: 12 additions & 12 deletions src/test/testcases/testPSUGetCapabilities.py
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Original file line number Diff line number Diff line change
Expand Up @@ -46,22 +46,22 @@ def getdoubleword(dataInInt):
'''
Capabilities structure
'''
capMsg = (getsingleword(0xD000000F) +
getsingleword(0x00) +
capMsg = (getsingleword(0xC000003F) +
getsingleword(0xC8000000) +
getsingleword(0xD1000001) +
getsingleword(0x0) +
getsingleword(0x0) +
getsingleword(0x0) +
getsingleword(0xD1800000) +
getsingleword(0xD2000000) +
getsingleword(0xD2800000) +
getsingleword(0xD3000001) +
getsingleword(0x0) +
getsingleword(0xD3800000) +
getsingleword(0xD4000001) +
getsingleword(0x0) +
getsingleword(0x0) +
getsingleword(0x0) +
getsingleword(0xD4800000) +
getsingleword(0xD5000000) +
getsingleword(0xD5800000) +
getsingleword(0xD6000001) +
getsingleword(0x0) +
getsingleword(0xD700007F) +
getsingleword(0x0))
getsingleword(0xD6800000) +
getsingleword(0xD700007E) +
getsingleword(0xD7800000))

def getCapabilities(addr, size, exp_status):
# Intialize the class obj instances
Expand Down

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