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p9_sbe_common -- mark TP LFIR bit 37 as recoverable
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TP LFIR 37 is meant to be marked recoverable for Cumulus
60118 unmasked the bit, but the default action register settings
are programmed to trigger a checkstop.  This adjust the action1 register
default to recoverable.

Change-Id: I8d07fdac8eb060ba10929133fdbe93621b8b53e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60244
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60261
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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jjmcgill authored and sgupta2m committed Jun 12, 2018
1 parent 7d1ec1f commit 5cef9c4
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,7 @@ const uint64_t PERV_LFIR_ACTION0[15] =

const uint64_t PERV_LFIR_ACTION1[15] =
{
0xF0003C2003800000ULL, // TP
0xF0003C2007800000ULL, // TP
0xF000000000000000ULL, // N0
0xF000000000000000ULL, // N1
0xF000000000000000ULL, // N2
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