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Update whitelist for p9_block_wakeup_intr
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Change-Id: I9dce4fd043a05cce88a08940ea7131f255c3eb99
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60369
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60373
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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sgupta2m committed Jun 15, 2018
1 parent 9e29d4f commit 62e384f
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3 changes: 3 additions & 0 deletions src/import/chips/p9/security/p9_security_white_black_list.csv
Original file line number Diff line number Diff line change
Expand Up @@ -905,6 +905,9 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U
,Core,200F0100,0x20-0x37,HWSV, SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist,
,EQ,100F0100,0x10-0x15,HWSV, SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist,
,EQ,100F03FF,0x10-0x15,HWSV, EQ Atomic Lock register for special wakeup ffdc collection, p9_eq_clear_atomic_lock, write_whitelist,
,CORE,0x200f0108,0x20-0x37,HWSV,,p9_block_wakeup_intr.C,write_whitelist,
,CORE,0x200f0101,0x20-0x37,HWSV,,p9_block_wakeup_intr.C,write_whitelist,
,CORE,0x200f0107,0x20-0x37,HWSV,,p9_block_wakeup_intr.C,write_whitelist,
,,0x050107D0,0x05,DUMP,,for performance dumps,write_whitelist,
,PERV,0x000107D0,0x00-0x37,DUMP,,Local checkstops: Stop trace on all perv chiplets,write_whitelist,
,,0x05011C0A,0x05,DUMP,, MPIPL: restart traces ,write_whitelist,
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