Updates the training advanced algorithm

CQ:SW433145
RTC:194245
RTC:194985
Change-Id: I3022653dd2ab93f28b97a813c3277ae57846edee
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60698
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69813
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -1981,13 +1981,13 @@
             The first 0-15 bits are for PATTERN0,
             bits 16-32 are for PATTERN1.
             If this attribute is set to 0, using the default values of:
-            0x8E8E for PATTERN0
+            0x8E94 for PATTERN0
             0x2BC6 for PATTERN1
             Set to default in eff_config
         </description>
         <valueType>uint32</valueType>
         <initToZero></initToZero>
-        <enum>DEFAULT_PATTERN0 = 0x8E8E, DEFAULT_PATTERN1 = 0x2BC6</enum>
+        <enum>DEFAULT_PATTERN0 = 0x8E94, DEFAULT_PATTERN1 = 0x2BC6</enum>
         <writeable/>
         <array>2</array>
         <mssAccessorName>custom_training_adv_patterns</mssAccessorName>
@@ -2019,6 +2019,32 @@
         <mssAccessorName>custom_training_adv_backup_patterns</mssAccessorName>
     </attribute>
 
+    <attribute>
+        <id>ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2</id>
+        <targetType>TARGET_TYPE_MCS</targetType>
+        <description>
+            Special training backup pattern number 2
+            Used for custom_pattern_read in draminit_training_advance.
+            If the main patterns fail, the code will try running this pattern
+            Used for read centering
+            There can be two patterns used here.
+            This attribute is before swizzling for endianness of the registers.
+            CODE WILL SWIZZLE FOR THE SYSTEM
+            The first 0-15 bits are for PATTERN0,
+            bits 16-32 are for PATTERN1.
+            If this attribute is set to 0, using the default values of:
+            0x13EC for PATTERN0
+            0x02FD for PATTERN1
+            Set to default in eff_config
+        </description>
+        <valueType>uint32</valueType>
+        <initToZero></initToZero>
+        <enum>DEFAULT_PATTERN0 = 0x13EC, DEFAULT_PATTERN1 = 0x02FD</enum>
+        <writeable/>
+        <array>2</array>
+        <mssAccessorName>custom_training_adv_backup_patterns2</mssAccessorName>
+    </attribute>
+
     <attribute>
         <id>ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN</id>
         <targetType>TARGET_TYPE_MCS</targetType>