Modify SPD blob and eff-config hardcoding to match VBU

Change-Id: If663431e64cb3432b4a77949e7a8cdc26b8eb35f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25970
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69769
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -128,24 +128,6 @@
         <mssAccessorName>dimm_mfg_id_code</mssAccessorName>
     </attribute>
 
-    <attribute>
-        <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            Number of ranks in each DIMM.
-            Used in various locations and is computed in mss_eff_cnfg.
-            values are 0,1,2, 4 up to 32
-            creator: mss_eff_cnfg
-            consumer: various
-            firmware notes: none
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <writeable/>
-        <array> 2 2</array>
-        <mssAccessorName>eff_num_ranks_per_dimm</mssAccessorName>
-    </attribute>
-
     <attribute>
         <id>ATTR_EFF_CUSTOM_DIMM</id>
         <targetType>TARGET_TYPE_MCS</targetType>
@@ -164,44 +146,6 @@
         <mssAccessorName>eff_custom_dimm</mssAccessorName>
     </attribute>
 
-    <attribute>
-        <id>ATTR_EFF_DRAM_WIDTH</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            DRAM Device Width: X4, X8, X16, X32.
-            Used in various locations and is computed in mss_eff_cnfg.
-            creator: mss_eff_cnfg
-            consumer: various
-            firmware notes: none
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>X4 = 4, X8 = 8, X16 = 16, X32 = 32</enum>
-        <mssUnit>bits</mssUnit>
-        <writeable/>
-        <array>2 2</array>
-        <mssAccessorName>eff_dram_width</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_DRAM_RANK_MIX</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            DRAM Device Rank Mix
-            Used in various locations and is computed in mss_eff_cnfg.
-            creator: mss_eff_cnfg
-            consumer: various
-            firmware notes: none
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>SYMMETRICAL = 0, ASYMMETICAL = 1</enum>
-        <mssUnit>bits</mssUnit>
-        <writeable/>
-        <array>2 2</array>
-        <mssAccessorName>eff_dram_rank_mix</mssAccessorName>
-    </attribute>
-
     <attribute>
         <id>ATTR_EFF_DIMM_SPARE</id>
         <targetType>TARGET_TYPE_MCS</targetType>