PM (Cronus): Add processor id for errors from p9_activate_stop15_cores

- reformatted error output for readability
- removed FAPI_ASSERT FFDC as these are not useful in Cronus;  moved the FFDC
  to printfs before the ASSERT
- Added isHalted() to ppe_utils
- added SSH and better SGPE oriented register FFDC
- removed extra setBit to core_sb buffer

Change-Id: Ie23f294b843b15a78b8d3ee036310631c0595904
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44758
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47138
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H

@@ -491,6 +491,19 @@ fapi2::ReturnCode ppe_write_iar(
     const uint64_t i_base_address,
     const uint64_t i_address );
 
+
+///--------------------------------------------------------------------------------------
+/// @brief Determine if the PPE is halted
+/// @param[in]   i_target        target
+/// @param[in]   i_base_address  base SCOM address of the PPE
+/// @param[out]  o_halted        boolean true if halted; false otherwise
+/// @return  fapi2::ReturnCode
+///--------------------------------------------------------------------------------------
+fapi2::ReturnCode ppe_isHalted(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+    const uint64_t i_base_address,
+    bool* o_halted);
+
 #ifndef  __HOSTBOOT_MODULE
 
 ///--------------------------------------------------------------------------------------