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compact suspend ffdc
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Change-Id: Ide9bb843b4b4526afe2432a58c5086e3fcb49f3c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43122
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43393
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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@adamant1 @sgupta2m
adamant1 authored and sgupta2m committed Aug 28, 2017
1 parent 3efc51f commit 7fb7f3b
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Showing 7 changed files with 116 additions and 115 deletions.
2 changes: 1 addition & 1 deletion src/build/import_hwp_mk/istepmpipl/Makefile
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Expand Up @@ -31,7 +31,7 @@ export SUB_OBJDIR = /$(IMPORT_OBJDIR)/istepmpipl
include img_defs.mk
include istepmpiplfiles.mk

export VPATH = $(PERV_SRCDIR):$(NEST_SRCDIR):$(CACHE_SRCDIR):$(CORE_SRCDIR):$(PM_SRCDIR):$(INITFILES_SRCDIR):$(LIB_SRCDIR)
export VPATH = $(PERV_SRCDIR):$(NEST_SRCDIR):$(CACHE_SRCDIR):$(CORE_SRCDIR):$(PM_SRCDIR):$(INITFILES_SRCDIR):$(HWPLIB_SRCDIR)

ifneq ($(ddlevel), DD2)
GCC-CFLAGS += -mlongcall
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1 change: 1 addition & 0 deletions src/build/import_hwp_mk/istepmpipl/istepmpiplfiles.mk
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Expand Up @@ -51,6 +51,7 @@ ISTEPMPIPL-CPP-SOURCES +=p9_pm_pfet_control.C
ISTEPMPIPL-CPP-SOURCES +=p9_suspend_io.C
ISTEPMPIPL-CPP-SOURCES +=p9_perv_sbe_cmn.C
ISTEPMPIPL-CPP-SOURCES +=p9_suspend_powman.C
ISTEPMPIPL-CPP-SOURCES +=p9_collect_suspend_ffdc.C
ISTEPMPIPL-C-SOURCES =
ISTEPMPIPL-S-SOURCES =

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135 changes: 69 additions & 66 deletions src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.C
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Expand Up @@ -22,23 +22,23 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
#if 0 // tmp dummy file to enable ppe manual mirror
#include <fapi2.H>
#include <p9_collect_suspend_ffdc.H>
#include <p9_sbe_ppe_ffdc.H>
#include <p9_ppe_defs.H>
#include <p9_misc_scom_addresses.H>
#include <p9_quad_scom_addresses.H>

#ifdef DD2 // PPE RAMming is supported on SBE only for DD2
#include <p9_sbe_ppe_ffdc.H>
#include <p9_ppe_defs.H>
#endif

#define NUM_SCOMS 28
#define NUM_LOC_VARS 19
#define NUM_BYTE_RANGES 52
#define CME_OFF 0x00000000BADCE0FF

uint32_t g_scom = 0;
uint32_t g_byte = 8;
uint64_t g_ffdcScoms[NUM_LOC_VARS];
uint32_t g_index = 0;

const uint32_t g_byteranges[NUM_BYTE_RANGES] =
const uint32_t byteranges[NUM_BYTE_RANGES] =
{
0x07, //PGPE XIR
0x07, //PGPE XIR
Expand All @@ -65,73 +65,72 @@ const uint32_t g_byteranges[NUM_BYTE_RANGES] =
0x47, 0x47, 0x47, 0x47, 0x47, 0x47, //CME[0-5] IAR
0x47, 0x47, 0x47, 0x47, 0x47, 0x47 //CME[6-11] IAR
}; //
const uint64_t masks[8] =
{
0xFF,
0xFFFF,
0xFFFFFF,
0xFFFFFFFF,
0xFFFFFFFFFF,
0xFFFFFFFFFFFF,
0xFFFFFFFFFFFFFF,
0xFFFFFFFFFFFFFFFF
};

uint64_t extract(uint64_t data, uint32_t low, uint32_t high)
{
return ((data >> (56 - (high << 3))) & masks[(high - low)]);
uint32_t bitshift = (high - low) * 8;
return ((data >> (56 - (high << 3))) & (0xFFFFFFFFFFFFFFFF >> (56 - bitshift)));
}
void add_data(uint64_t l_data64)

void add_data(uint64_t l_data64, uint32_t& index, uint32_t& byte, uint32_t& scom, uint64_t* ffdcScoms)
{
//first nibble hold2 low g_byte
uint32_t low = g_byteranges[g_index] >> 4;
//second nibble holds high g_byte
uint32_t high = g_byteranges[g_index] & 0xFF;
g_index++;
//first nibble hold2 low byte
uint32_t low = byteranges[index] >> 4;
//second nibble holds high byte
uint32_t high = byteranges[index] & 0xFF;
index++;
uint32_t length = (high - low) + 1;
//gets data between low and high g_byte inclusive
//gets data between low and high byte inclusive
uint64_t data = extract(l_data64, low, high);

if(g_byte - length < 0)//if length of data greater than remaining space in current local variable
if(byte - length < 0)//if length of data greater than remaining space in current local variable
{
length -= g_byte;
g_ffdcScoms[g_scom] |= (data >> (length << 3)); //stores what will fit in current variable
data &= masks[length]; //sets up remaining data to be stored in next variable
g_scom++;
g_byte = 8;
length -= byte;
ffdcScoms[scom] |= (data >> (length << 3)); //stores what will fit in current variable
uint32_t bitshift = (high - low) * 8;
data &= (0xFFFFFFFFFFFFFFFF >> (56 - bitshift)); //sets up remaining data to be stored in next variable
scom++;
byte = 8;
}

g_ffdcScoms[g_scom] |= (data << ((length - g_byte) << 3)); //stores data in current variable
g_byte -= length;
ffdcScoms[scom] |= (data << ((length - byte) << 3)); //stores data in current variable
byte -= length;

if(!g_byte) //if no space left in current local variable move to next
if(!byte) //if no space left in current local variable move to next
{
g_scom++;
g_byte = 8;
scom++;
byte = 8;
}
}

fapi2::ReturnCode
p9_collect_suspend_ffdc (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
FAPI_INF (">> p9_collect_suspend_ffdc.exe");
uint32_t scom = 0;
uint32_t byte = 8;
uint64_t ffdcScoms[NUM_LOC_VARS];
uint32_t index = 0;

fapi2::buffer<uint64_t> l_data64;
std::vector<uint64_t> ppe_regs;
uint32_t sbe_index;

for(sbe_index = 0; sbe_index < NUM_LOC_VARS; sbe_index++)
{
g_ffdcScoms[sbe_index] = 0;
ffdcScoms[sbe_index] = 0xDEADC0DEDEADC0DE;
}

// SBE does not support ppe ffdc on DD1
#ifdef DD2
///Collect PGPE Data
p9_sbe_ppe_ffdc ( i_target,
PGPE_BASE_ADDRESS,
ppe_regs );

for(sbe_index = 0; sbe_index < ppe_regs.size(); sbe_index++)
{
add_data(ppe_regs[sbe_index]);
add_data(ppe_regs[sbe_index], index, byte, scom, ffdcScoms);
}

//Collect SGPE Data
Expand All @@ -141,9 +140,16 @@ p9_collect_suspend_ffdc (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta

for(sbe_index = 0; sbe_index < ppe_regs.size(); sbe_index++)
{
add_data(ppe_regs[sbe_index]);
add_data(ppe_regs[sbe_index], index, byte, scom, ffdcScoms);
}

#else
// Each call to p9_sbe_ppe_ffdc would add REG_FFDC_IDX_MAX elements.
// These are defaulted in DD1 on SBE, so simply account for those in the
// ffdcScoms index by incrementing accordingly
index += 8; // (REG_FFDC_IDX_MAX * 2);
#endif // DD2

//Collect All other SCOMs
uint32_t scoms[NUM_SCOMS] =
{
Expand All @@ -166,7 +172,7 @@ p9_collect_suspend_ffdc (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
fapi2::getScom ( i_target,
scoms[getscom_index],
l_data64 );
add_data(l_data64);
add_data(l_data64, index, byte, scom, ffdcScoms);

}

Expand Down Expand Up @@ -195,43 +201,40 @@ p9_collect_suspend_ffdc (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
fapi2::getScom( i_target,
DBGPRO[ex],
l_data64 );
add_data(l_data64);
add_data(l_data64, index, byte, scom, ffdcScoms);
}
else
{
add_data(CME_OFF); //inject data which informs cme is offline
add_data(CME_OFF, index, byte, scom, ffdcScoms); //inject data which informs cme is offline
}
}

//Write out compacted SCOM data
FAPI_ASSERT ( false,
fapi2::SUSPEND_FFDC()
.set_PROC_CHIP_TARGET (i_target)
.set_PGPE_XSR_AND_IAR (g_ffdcScoms[0])
.set_PGPE_IR_AND_EDR (g_ffdcScoms[1])
.set_PGPE_LR_AND_SPRG0 (g_ffdcScoms[2])
.set_PGPE_SRR0_AND_SRR1 (g_ffdcScoms[3])
.set_SGPE_XSR_AND_IAR (g_ffdcScoms[4])
.set_SGPE_IR_AND_EDR (g_ffdcScoms[5])
.set_SGPE_LR_AND_SPRG0 (g_ffdcScoms[6])
.set_SGPE_SRR0_AND_SRR1 (g_ffdcScoms[7])
.set_OCCS2_AND_OCCFLG (g_ffdcScoms[8])
.set_OPIT2C_0_THROUGH_7_B0 (g_ffdcScoms[9])
.set_OPIT2C_8_THROUGH_15_B0 (g_ffdcScoms[10])
.set_OPIT2C_16_THROUGH_23_B0 (g_ffdcScoms[11])
.set_QCSR_B0_TO_B1_AND_CCSR_B0_TO_B2_AND_3B_EMPTY (g_ffdcScoms[12])
.set_CME0_IAR_AND_CME1_IAR (g_ffdcScoms[13])
.set_CME2_IAR_AND_CME3_IAR (g_ffdcScoms[14])
.set_CME4_IAR_AND_CME5_IAR (g_ffdcScoms[15])
.set_CME6_IAR_AND_CME7_IAR (g_ffdcScoms[16])
.set_CME8_IAR_AND_CME9_IAR (g_ffdcScoms[17])
.set_CME10_IAR_AND_CME11_IAR (g_ffdcScoms[18]),
.set_PGPE_XSR_AND_IAR (ffdcScoms[0])
.set_PGPE_IR_AND_EDR (ffdcScoms[1])
.set_PGPE_LR_AND_SPRG0 (ffdcScoms[2])
.set_PGPE_SRR0_AND_SRR1 (ffdcScoms[3])
.set_SGPE_XSR_AND_IAR (ffdcScoms[4])
.set_SGPE_IR_AND_EDR (ffdcScoms[5])
.set_SGPE_LR_AND_SPRG0 (ffdcScoms[6])
.set_SGPE_SRR0_AND_SRR1 (ffdcScoms[7])
.set_OCCS2_AND_OCCFLG (ffdcScoms[8])
.set_OPIT2C_0_THROUGH_7_B0 (ffdcScoms[9])
.set_OPIT2C_8_THROUGH_15_B0 (ffdcScoms[10])
.set_OPIT2C_16_THROUGH_23_B0 (ffdcScoms[11])
.set_QCSR_B0_TO_B1_AND_CCSR_B0_TO_B2_AND_3B_EMPTY (ffdcScoms[12])
.set_CME0_IAR_AND_CME1_IAR (ffdcScoms[13])
.set_CME2_IAR_AND_CME3_IAR (ffdcScoms[14])
.set_CME4_IAR_AND_CME5_IAR (ffdcScoms[15])
.set_CME6_IAR_AND_CME7_IAR (ffdcScoms[16])
.set_CME8_IAR_AND_CME9_IAR (ffdcScoms[17])
.set_CME10_IAR_AND_CME11_IAR (ffdcScoms[18]),
"Suspend FFDC");

fapi_try_exit:
FAPI_INF ("<< p9_collect_suspend_ffdc");
return fapi2::current_err;
}

#endif

5 changes: 1 addition & 4 deletions src/import/chips/p9/procedures/hwp/lib/p9_collect_suspend_ffdc.H
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Expand Up @@ -27,11 +27,10 @@
///
/// *HWP HW Owner : Adam Hale <Adam.Samuel.Hale@ibm.com>
/// *HWP HW Backup Owner : Brian Vanderpool <vanderp@us.ibm.com>
/// *HWP FW Owner : Raja Das
/// *HWP FW Owner : Raja Das <rajadas2@in.ibm.com>
/// *HWP Team : PM
/// *HWP Level : 3
/// *HWP Consumed by : SBE
#if 0 // tmp change to enable manual mirror to ppe
#ifndef __P9_COLLECT_SUSPEND_FFDC_H__
#define __P9_COLLECT_SUSPEND_FFDC_H__

Expand Down Expand Up @@ -65,5 +64,3 @@ p9_collect_suspend_ffdc (
);

#endif // __P9_COLLECT_SUSPEND_FFDC_H__
#endif

32 changes: 11 additions & 21 deletions src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.C
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Expand Up @@ -28,10 +28,10 @@
/// @file p9_suspend_powman.C
/// @brief Suspend the OCC/PM
///
// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP HWP Owner Adam Hale Adam.Samuel.Hale@ibm.com
// *HWP FW Owner: Raja Das rajadas2@in.ibm.com
// *HWP Team: PM
// *HWP Level: 2
// *HWP Level: 3
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------
Expand All @@ -53,10 +53,7 @@
#include <p9_quad_scom_addresses.H>
#include <p9_quad_scom_addresses_fld.H>
#include <p9_pm_hcd_flags.h>

static const uint64_t GPE2_BASE_ADDRESS = 0x00064010;
static const uint64_t GPE3_BASE_ADDRESS = 0x00066010;
static const uint64_t CME_BASE_ADDRESS = 0x10012010;
#include <p9_collect_suspend_ffdc.H>

static const uint64_t POLLTIME_US = 1;
static const uint64_t POLLTIME_MCYCLES = 4000;
Expand All @@ -75,13 +72,10 @@ extern "C" {
fapi2::ReturnCode p9_suspend_powman(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
FAPI_DBG("Entering p9_suspend_powman...\n")

fapi2::buffer<uint64_t> l_occflg_data(0);
fapi2::buffer<uint64_t> l_occs2_data(0);
fapi2::buffer<uint64_t> l_ocr_reg_data(0);
fapi2::buffer<uint64_t> l_pgpe_xsr(0);
auto l_quad_vector = i_target.getChildren<fapi2::TARGET_TYPE_EQ>();
auto l_core_vector = i_target.getChildren<fapi2::TARGET_TYPE_CORE>();

bool l_pgpe_in_safe_mode = false;
bool l_pgpe_suspended = false;
Expand Down Expand Up @@ -132,14 +126,6 @@ extern "C" {
}
}

// if timeout, hwp fails
/*FAPI_ASSERT(l_pgpe_in_safe_mode,
fapi2::P9_PGPE_SAFEMODE_TIMEOUT().set_PROC_CHIP_TARGET(i_target).set_PPE_BASE_ADDRESSES(ppe_addresses),
"PGPE did not signal that it entered safe mode");
*/
//FAPI_DBG("Entered Safe Mode Successfully!\n");


//SBE issues "halt OCC complex" to stop OCC instructions
l_ocr_reg_data.setBit<PU_OCB_PIB_OCR_OCC_DBG_HALT>();
FAPI_TRY(fapi2::putScom(i_target, PU_OCB_PIB_OCR_OR, l_ocr_reg_data), "Error writing to OCR register");
Expand All @@ -165,9 +151,13 @@ extern "C" {
}

//if timeout, hwp fails
FAPI_ASSERT(l_pgpe_suspended,
fapi2::P9_PGPE_SUSPEND_TIMEOUT().set_PROC_CHIP_TARGET(i_target),
"PGPE did not signal that PM Complex Suspend Finished");
if(!l_pgpe_suspended)
{
FAPI_ERR("PGPE did not signal that PM Complex Suspend Finished");
FAPI_TRY ( p9_collect_suspend_ffdc (
i_target));
}

FAPI_DBG("Suspend Power Management Successful!\n");
}
else
Expand Down
9 changes: 4 additions & 5 deletions src/import/chips/p9/procedures/hwp/pm/p9_suspend_powman.H
View file
Expand Up @@ -27,20 +27,19 @@
/// @file p9_suspend_powman.H
/// @brief Suspend the OCC/PM
//
// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP HWP Owner: Adam Hale Adam.Samuel.Hale@ibm.com
// *HWP FW Owner: Raja Das rajadas2@in.ibm.com
// *HWP Team: PM
// *HWP Level: 2
// *HWP Level: 3
// *HWP Consumed by: SBE
// ----------------------------------------------------------------------------------

#ifndef P9_SUSPEND_POWMAN__
#define P9_SUSPEND_POWMAN_
#define P9_SUSPEND_POWMAN__

//-------------------------------------------------------
// Includes
//-------------------------------------------------------

#include <fapi2.H>

//-------------------------------------------------------
Expand Down

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