Skip to content

Commit

Permalink
Cache HWP: DD1 VCS Workaround
Browse files Browse the repository at this point in the history
Change-Id: Ie1539ac675d2c66568feff5ad181005a4caec561
Original-Change-Id: I9634a767878904f810cb1e6a0767ba4bbad241cb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30827
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
  • Loading branch information
davidduyue authored and Shakeebbk committed Sep 12, 2017
1 parent d5844a7 commit 844735a
Showing 1 changed file with 18 additions and 0 deletions.
Expand Up @@ -181,4 +181,22 @@
</chip>
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_VCS_POWER_ON_IN_CHIPLET_RESET</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
DD1 only: enable VCS workaround in istep4 cache hwp. This is used by
the procedure for p9_hcd_cache_poweron and p9_hcd_cache_chiplet_reset.
</description>
<chipEcFeature>
<chip>
<name>ENUM_ATTR_NAME_NIMBUS</name>
<ec>
<value>0x20</value>
<test>LESS_THAN</test>
</ec>
</chip>
</chipEcFeature>
</attribute>
</attributes>

0 comments on commit 844735a

Please sign in to comment.