Add EQ ATOMIC LOCK SCOM to security write whitelist for FFDC

Special wakeup fails from FSP need to colect some CME SCOMs that
can be accessed after grabbing this lock. Does not comprise access
to any sensitive hardware / firmware facility

Change-Id: If074c73478f2d8feb586c41aee8eb49b8a9fce6a
CQ: SW417220
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54429
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54436
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/security/p9_security_white_black_list.csv

@@ -837,6 +837,7 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U
 ,EQ,100F0040,0x10-0x15,HWSV,  SPL_WKUP-special wakeups Network Control registers, p9_cpu_special_wakeup.H, write_whitelist,
 ,Core,200F0100,0x20-0x37,HWSV,  SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist,
 ,EQ,100F0100,0x10-0x15,HWSV,  SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist,
+,EQ,100F03FF,0x10-0x15,HWSV,  EQ Atomic Lock register for special wakeup ffdc collection, p9_eq_clear_atomic_lock, write_whitelist,
 ,,0x050107D0,0x05,DUMP,,for performance dumps,write_whitelist,
 ,PERV,0x000107D0,0x00-0x37,DUMP,,Local checkstops: Stop trace on all perv chiplets,write_whitelist,
 ,,0x05011C0A,0x05,DUMP,, MPIPL: restart traces ,write_whitelist,