Fix up setup_cal and vref attrs

    Fix bug when setting RD_VREF but not RD_CNTR
    Change name of MSS_VREF_CAL_STEP_ENABLE to
    MSS_RDVREF_CAL_STEP_ENABLE
    Set RD_VREF_CALENABLE_REG in setup_cal

Change-Id: Ie4117a53c2ae2e53e7b753cc2b0b127cab0d4caf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38484
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69801
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -1966,6 +1966,21 @@
         <mssAccessorName>vref_cal_enable</mssAccessorName>
     </attribute>
 
+    <attribute>
+        <id>ATTR_MSS_RDVREF_CAL_ENABLE</id>
+        <targetType>TARGET_TYPE_MCS</targetType>
+        <description>
+            A bit vector denoting bits in every DP16 on the port to be calibrated.
+            That is, all of the set bits will be calibrated for all DP16. A value
+            of zero indicates the calibration should not be run.
+        </description>
+        <initToZero></initToZero>
+        <valueType>uint16</valueType>
+        <writeable/>
+        <array>2</array>
+        <mssAccessorName>rdvref_cal_enable</mssAccessorName>
+    </attribute>
+
     <attribute>
         <id>ATTR_MSS_CAL_ABORT_ON_ERROR</id>
         <targetType>TARGET_TYPE_SYSTEM</targetType>