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PSU get capabilities chip-op
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Support PSU get capabilities chipop

Change-Id: I36980433aaa70323c5b2b80a89d8618d03ea8a60
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55091
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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@Shakeebbk @sgupta2m
Shakeebbk authored and sgupta2m committed Mar 27, 2018
1 parent 8a161b1 commit 90d4e44
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Showing 7 changed files with 358 additions and 4 deletions.
68 changes: 67 additions & 1 deletion src/sbefw/app/common/sbecmdgeneric.C
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Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@
#include "sbeHostUtils.H"
#include "sbeglobals.H"
#include "sbeXipUtils.H"
#include "sbeMemAccessInterface.H"

#include "fapi2.H"
//#include "p9_xip_image.h"
Expand All @@ -54,6 +55,10 @@ static const uint32_t SBE_CAPABILITES_LEN_FIFO =
sizeof(sbeCapabilityRespMsg_t) -
(sizeof(uint32_t) *
(SBE_MAX_CAPABILITIES - CAPABILITIES_LAST_INDEX_FIFO - 1));
static const uint32_t SBE_CAPABILITES_LEN_PSU =
sizeof(sbeCapabilityRespMsg_t) -
(sizeof(uint32_t) *
(SBE_MAX_CAPABILITIES - CAPABILITIES_LAST_INDEX_PSU - 1));

sbeCapabilityRespMsg::sbeCapabilityRespMsg() : capability{}
{
Expand All @@ -69,6 +74,68 @@ sbeCapabilityRespMsg::sbeCapabilityRespMsg() : capability{}
}
// Functions
//----------------------------------------------------------------------------
uint32_t sbePsuGetCapabilities(uint8_t *i_pArg)
{
#define SBE_FUNC "sbePsuGetCapabilities "
uint32_t rc = SBE_SEC_OPERATION_SUCCESSFUL;
uint32_t l_fapiRc = FAPI2_RC_SUCCESS;

sbePsuGetCapabilitiesReq_t req = {};

sbeCapabilityRespMsg_t capMsg;
updatePsuCapabilities(capMsg.capability);

do
{
rc = sbeReadPsu2SbeMbxReg(SBE_HOST_PSU_MBOX_REG1,
sizeof(req)/sizeof(uint64_t),
(uint64_t*)&req,
true);
CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(rc);

SBE_DEBUG(SBE_FUNC "at addr[0x%08X%08X] len[0x%08X%08X]",
SBE::higher32BWord(req.address),
SBE::lower32BWord(req.address),
SBE::higher32BWord(req.size),
SBE::lower32BWord(req.size));

if((req.size < SBE_CAPABILITES_LEN_PSU) ||
(req.size % sbeMemAccessInterface::PBA_GRAN_SIZE_BYTES))
{
SBE_ERROR(SBE_FUNC " incorrect memory allocation");
SBE_GLOBAL->sbeSbe2PsuRespHdr.setStatus(SBE_PRI_INVALID_DATA,
SBE_SEC_INVALID_PARAMS);
break;
}
p9_PBA_oper_flag l_myPbaFlag;
l_myPbaFlag.setOperationType(p9_PBA_oper_flag::INJ);

sbeMemAccessInterface l_PBAInterface(
SBE_MEM_ACCESS_PBA,
req.address,
&l_myPbaFlag,
SBE_MEM_ACCESS_WRITE,
sbeMemAccessInterface::PBA_GRAN_SIZE_BYTES);
l_fapiRc = l_PBAInterface.accessWithBuffer(
&capMsg,
SBE_CAPABILITES_LEN_PSU,
true);
if(l_fapiRc != fapi2::FAPI2_RC_SUCCESS)
{
SBE_ERROR(SBE_FUNC "failed in writing to host memory");
SBE_GLOBAL->sbeSbe2PsuRespHdr.setStatus(
SBE_PRI_GENERIC_EXECUTION_FAILURE,
SBE_SEC_GENERIC_FAILURE_IN_EXECUTION);
break;
}
} while(false);

// Send the response
sbePSUSendResponse(SBE_GLOBAL->sbeSbe2PsuRespHdr, l_fapiRc, rc);
return rc;
#undef SBE_FUNC
}

uint32_t sbeGetCapabilities (uint8_t *i_pArg)
{
#define SBE_FUNC "sbeGetCapabilities "
Expand Down Expand Up @@ -490,4 +557,3 @@ uint32_t sbeReadMem( uint8_t *i_pArg )
#undef SBE_FUNC
}
#endif //not __SBEFW_SEEPROM__

28 changes: 27 additions & 1 deletion src/sbefw/app/common/sbecmdgeneric.H
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Original file line number Diff line number Diff line change
Expand Up @@ -91,15 +91,31 @@ typedef struct stashMsg
uint64_t addr;
}stashMsg_t;

// SBE PSU get capabilities request
typedef struct
{
uint64_t size;
uint64_t address;
} sbePsuGetCapabilitiesReq_t;

/**
* @brief Update Fifo capabilities
*
* @param[in] capability Pointer to capcbility array
* @param[in] capability Pointer to capability array
*
* @return void
*/
void updateFifoCapabilities(uint32_t * capability);

/**
* @brief Update PSU capabilities
*
* @param[in] capability Pointer to capability array
*
* @return void
*/
void updatePsuCapabilities(uint32_t * capability);

/**
* @brief retrieve SBE FFDC on request from FSP. (0xA801)
*
Expand Down Expand Up @@ -162,6 +178,7 @@ uint32_t sbeSetSystemFabricMap(uint8_t *i_pArg);
* @return Rc from the Psu access utility
*/
uint32_t sbeStashKeyAddrPair(uint8_t *i_pArg);

/**
* @brief Read the data from SBE memory (0xD703)
*
Expand All @@ -170,3 +187,12 @@ uint32_t sbeStashKeyAddrPair(uint8_t *i_pArg);
* @return Rc from the Psu access utility
*/
uint32_t sbeReadMem(uint8_t *i_pArg);

/**
* @brief SBE Psu get capabilities(0xD702)
*
* @param[in] i_pArg Buffer to be passed to the function (not used as of now)
*
* @return Rc from the Psu access utility
*/
uint32_t sbePsuGetCapabilities(uint8_t *i_pArg);
7 changes: 6 additions & 1 deletion src/sbefw/app/power/chipop_table.C
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Original file line number Diff line number Diff line change
Expand Up @@ -291,7 +291,12 @@ CMD_ARR(
//////////////////////////////////////////////////////////////
CMD_ARR(
D7,
{sbeReadMem,
{sbePsuGetCapabilities,
SBE_PSU_GENERIC_MSG_GET_CAPABILITIES,
SBE_NO_FENCE,
},

{sbeReadMem,
SBE_PSU_GENERIC_MSG_READ_SBE_MEM,
SBE_NO_FENCE,
},
Expand Down
31 changes: 30 additions & 1 deletion src/sbefw/app/power/sbecmdgeneric.C
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Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,36 @@ using namespace fapi2;

#ifdef __SBEFW_SEEPROM__

void updatePsuCapabilities(uint32_t * capability)
{
capability[PSU_GENERIC_CAPABILTITY_START_IDX] =
PSU_HWP_FFDC_COLLECTION_SUPPORTED |
PSU_SBE_FFDC_COLLECTION_SUPPORTED |
PSU_ADDRESS_BLACKLIST_SUPPORTED |
PSU_HOST_COMMAND_INTERFACE_SUPPORTED;

capability[PSU_CORE_CONTROL_CAPABILITY_START_IDX] =
PSU_CONTROL_DEADMAN_LOOP;

capability[PSU_RING_CAPABILITY_START_IDX] =
PSU_PUT_RING_FROM_IMAGE_SUPPORTED;

capability[PSU_TIMER_CAPABILITY_START_IDX] =
PSU_CONTROL_TIMER_SUPPORTED;

capability[PSU_SECURITY_CONTROL_CAPABILITY_START_IDX] =
PSU_UNSECURE_MEM_REGION_SUPPORTED;

capability[PSU_GENERIC_CHIPOP_CAPABILITY_START_IDX] =
PSU_GET_SBE_FFDC_SUPPPORTED |
PSU_GET_SBE_CAPABILITIES_SUPPPORTED |
PSU_READ_SBE_SEEPROM_SUPPORTED |
PSU_SET_FFDC_ADDRESS_SUPPORTED |
PSU_QUISCE_SUPPORTED |
PSU_SET_SYSTEM_FABRIC_ID_MAP_SUPPORTED |
PSU_STASH_MPIPL_CONFIG_SUPPORTED;

}
void updateFifoCapabilities(uint32_t * capability)
{
// @TODO via RTC : 160602
Expand Down Expand Up @@ -90,4 +120,3 @@ void updateFifoCapabilities(uint32_t * capability)

#ifndef __SBEFW_SEEPROM__
#endif //not __SBEFW_SEEPROM__

70 changes: 70 additions & 0 deletions src/sbefw/core/sbe_host_intf.H
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Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,7 @@ enum sbePsuUpdateMemoryRegionMessages
*/
enum sbePsuGenericMessages
{
SBE_PSU_GENERIC_MSG_GET_CAPABILITIES = 0x02,
SBE_PSU_GENERIC_MSG_READ_SBE_MEM = 0x03,
SBE_PSU_GENERIC_MSG_SET_FFDC_ADDR = 0x04,
SBE_PSU_GENERIC_MSG_QUIESCE = 0x05,
Expand Down Expand Up @@ -133,4 +134,73 @@ enum sbeUnsecureMemRegionControlFlags
SBE_MEM_REGION_CLOSE = 0x0020,
};

/**
* @brief capabilities index values.
* Get Capability response will return 18 capabilities. This
* enum tells the index for each capability. Currently each generic
* functionality( scom, IPL ) etc span across two capabilities.
*/
enum PSU_CAPABILITIES_INDEX
{
PSU_GENERIC_CAPABILTITY_START_IDX = 0,
PSU_CORE_CONTROL_CAPABILITY_START_IDX = 2,
PSU_SCOM_CAPABILITY_START_IDX = 4,
PSU_RING_CAPABILITY_START_IDX = 6,
PSU_TIMER_CAPABILITY_START_IDX = 8,
PSU_MPIPL_CAPABILITY_START_IDX = 10,
PSU_SECURITY_CONTROL_CAPABILITY_START_IDX = 12,
PSU_GENERIC_CHIPOP_CAPABILITY_START_IDX = 14,
// Keep in sync with the spec
CAPABILITIES_LAST_INDEX_PSU = 15,
};
/**
* @brief capabilities enum values.
*
*/
enum PSU_CAPABILITIES
{
// Capabilities 0, 1
PSU_HWP_FFDC_COLLECTION_SUPPORTED = 0xD0000001,
PSU_SBE_FFDC_COLLECTION_SUPPORTED = 0xD0000002,
PSU_ADDRESS_BLACKLIST_SUPPORTED = 0xD0000004,
PSU_HOST_COMMAND_INTERFACE_SUPPORTED = 0xD0000008,
PSU_SP_LESS_MPIPL_SUPPORTED = 0xD0000010,
PSU_RESERVED_0 = 0xD0000000,

// Capabilities 2, 3
PSU_CONTROL_DEADMAN_LOOP = 0xD1000001,
PSU_RESERVED_1 = 0xD1000000,

// Capabilities 4, 5
PSU_EXECUTE_MULTI_SCOM_SUPPORTED = 0xD2000001,
PSU_RESERVED_2 = 0xD2000000,

// Capabilites 6, 7
PSU_PUT_RING_FROM_IMAGE_SUPPORTED = 0xD3000001,
PSU_RESERVED_3 = 0xD3000000,

// Capabilities 8, 9
PSU_CONTROL_TIMER_SUPPORTED = 0xD4000001,
PSU_RESERVED_4 = 0xD4000000,

// Capabilities 10, 11
PSU_GET_ARCHITECTED_REG_SUPPORTED = 0xD5000001,
PSU_CLEAR_ARCHITECTED_REG_SUPPORTED = 0xD5000002,
PSU_RESERVED_5 = 0xD5000000,

// Capabilities 12, 13
PSU_UNSECURE_MEM_REGION_SUPPORTED = 0xD6000001,
PSU_RESERVED_6 = 0xD6000000,

// Capabilities 14, 15
PSU_GET_SBE_FFDC_SUPPPORTED = 0xD7000001,
PSU_GET_SBE_CAPABILITIES_SUPPPORTED = 0xD7000002,
PSU_READ_SBE_SEEPROM_SUPPORTED = 0xD7000004,
PSU_SET_FFDC_ADDRESS_SUPPORTED = 0xD7000008,
PSU_QUISCE_SUPPORTED = 0xD7000010,
PSU_SET_SYSTEM_FABRIC_ID_MAP_SUPPORTED = 0xD7000020,
PSU_STASH_MPIPL_CONFIG_SUPPORTED = 0xD7000040,
PSU_RESERVED_7 = 0xD7000000,
};

#endif // __SBEFW_SBE_HOST_INTF_H
4 changes: 4 additions & 0 deletions src/test/testcases/test.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,10 @@
<include>../simics/targets/p9_nimbus/sbeTest/testPutGetMem.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testPSUSetFFDCAddr.xml</include>
<testcase>
<simcmd>run-python-file targets/p9_nimbus/sbeTest/testPSUGetCapabilities.py</simcmd>
<exitonerror>yes</exitonerror>
</testcase>
<include>../simics/targets/p9_nimbus/sbeTest/testSram.xml</include>
<!-- we want to start hostboot after our memory testcases -->
<testcase>
Expand Down

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