Fix test sequence

Delay istep 5.2, to avoid HB managing the mem windows before our memory testcases Change-Id: If21eaf65c2a5e17bf3b9e6fb7d85ad0ee877348b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55909 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
open-power · Mar 15, 2018 · 967fefd · 967fefd
1 parent efcd5ec
commit 967fefd
Show file tree

Hide file tree

Showing 2 changed files with 6 additions and 5 deletions.
diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
@@ -41,6 +41,11 @@
           <include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testPSUSetFFDCAddr.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testSram.xml</include>
+          <!-- we want to start hostboot after our memory testcases -->
+          <testcase>
+              <simcmd>sbe-istep 5 2</simcmd>
+              <exitonerror>yes</exitonerror>
+          </testcase>
           <!-- TODO add testCntlInstruction.xml -->
           <include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include>

diff --git a/src/test/testcases/testIstep.xml b/src/test/testcases/testIstep.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER sbe Project                                                  -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -317,10 +317,6 @@
           <simcmd>sbe-istep 5 1</simcmd>
           <exitonerror>yes</exitonerror>
       </testcase>
-      <testcase>
-          <simcmd>sbe-istep 5 2</simcmd>
-          <exitonerror>yes</exitonerror>
-      </testcase>
       <!-- Stash address test case -->
       <testcase>
           <simcmd>run-python-file targets/p9_nimbus/sbeTest/testMatchStashPair.py</simcmd>