Skip to content

Commit

Permalink
set PEC disable store thread based ordering chicken switches
Browse files Browse the repository at this point in the history
Change-Id: I2d9aed7833a1bf43c797689d50ff32794ef54cff
CQ: SW430383
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62028
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62042
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
  • Loading branch information
jjmcgill authored and sgupta2m committed Jul 11, 2018
1 parent add2282 commit b725244
Show file tree
Hide file tree
Showing 3 changed files with 141 additions and 1 deletion.
107 changes: 106 additions & 1 deletion src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -43,6 +43,108 @@
#include "p9_const_common.H"
#include <p9_ring_id.h>

fapi2::ReturnCode
p9_sbe_nest_initf_sw430383_wa(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
FAPI_DBG("Start");

fapi2::ATTR_CHIP_EC_FEATURE_SW430383_Type l_sw430383;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SW430383,
i_target,
l_sw430383),
"Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SW430383");

if (l_sw430383)
{
fapi2::buffer<uint64_t> l_scan_region;
fapi2::buffer<uint64_t> l_scan_data;

// ring:
// n2_fure 0x04035C0F 96269 N Y Y Y NESTN2 OFF
//
// bits to set:
// 1 4083 92185 0 PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
// 1 45823 50445 0 PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
// 1 70000 26268 0 PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)

// inject header
l_scan_region.setBit<PERV_1_SCAN_REGION_TYPE_PERV>(). // PERV
setBit<PERV_1_SCAN_REGION_TYPE_UNIT2>(). // PCIS0
setBit<PERV_1_SCAN_REGION_TYPE_UNIT3>(). // PCIS1
setBit<PERV_1_SCAN_REGION_TYPE_UNIT4>(). // PCIS2
setBit<PERV_1_SCAN_REGION_TYPE_FUNC>(). // FUNC
setBit<PERV_1_SCAN_REGION_TYPE_REGF>(); // REGF
FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN_REGION_TYPE, l_scan_region));
l_scan_data = 0xA5A5A5A5A5A5A5A5;
FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));

// scan 0..4083 (37*110 + 13)
for (auto ii = 0; ii < 37; ii++)
{
FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
}

FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x0D, l_scan_data));

// flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2
FAPI_DBG("Flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2");
l_scan_data.setBit<0>();
FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));

// scan 4083..45823 (379*110 + 50)
for (auto ii = 0; ii < 379; ii++)
{
FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
}

FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x32, l_scan_data));

// flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
FAPI_DBG("Flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)");
l_scan_data.setBit<0>();
FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));

// scan 45823..70000 (219*110 + 87)
for (auto ii = 0; ii < 219; ii++)
{
FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
}

FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x57, l_scan_data));

// flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
FAPI_DBG("Flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)");
l_scan_data.setBit<0>();
FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));

// scan 70000..96269 (238*110 + 89)
for (auto ii = 0; ii < 238; ii++)
{
FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
}

FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x59, l_scan_data));

// check header
FAPI_ASSERT((l_scan_data == 0xA5A5A5A5A5A5A5A5),
fapi2::P9_PUTRING_CHECKWORD_DATA_MISMATCH().
set_TARGET(i_target).
set_CHIPLET_ID(0x02).
set_SCOM_ADDRESS(PERV_N2_SCAN32).
set_SCOM_DATA(l_scan_data()).
set_BITS_DECODED(0).
set_RINGID(n2_fure).
set_RINGMODE(fapi2::RING_MODE_HEADER_CHECK).
set_RETURN_CODE(0),
"Error rotating n2_fure for sw430383");
}

fapi_try_exit:
FAPI_DBG("End");
return fapi2::current_err;
}


fapi2::ReturnCode p9_sbe_nest_initf(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
Expand Down Expand Up @@ -150,6 +252,9 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
FAPI_TRY(fapi2::putRing(i_target_chip, n2_fure),
"Error from putRing (n2_fure)");

FAPI_TRY(p9_sbe_nest_initf_sw430383_wa(i_target_chip),
"Error from p9_sbe_nest_initf_sw430383_wa");

if (!l_read_attr.getBit<9>()) //Check iopsi is enable
{
FAPI_DBG("Scan n2_psi_fure ring");
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -7553,6 +7553,37 @@
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_SW430383</id>
<targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
<description>
Revert PCI store thread based ordering mode for SW430383
</description>
<chipEcFeature>
<chip>
<name>ENUM_ATTR_NAME_CUMULUS</name>
<ec>
<value>0x11</value>
<test>GREATER_THAN_OR_EQUAL</test>
</ec>
</chip>
<chip>
<name>ENUM_ATTR_NAME_NIMBUS</name>
<ec>
<value>0x23</value>
<test>GREATER_THAN_OR_EQUAL</test>
</ec>
</chip>
<chip>
<name>ENUM_ATTR_NAME_AXONE</name>
<ec>
<value>0x10</value>
<test>GREATER_THAN_OR_EQUAL</test>
</ec>
</chip>
</chipEcFeature>
</attribute>
<!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_SW432374</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -565,6 +565,10 @@ attribute tank
<name>ATTR_CHIP_EC_FEATURE_HW440920</name>
<virtual/>
</entry>
<entry>
<name>ATTR_CHIP_EC_FEATURE_SW430383</name>
<virtual/>
</entry>
<entry>
<name>ATTR_SBE_ADDR_KEY_STASH_ADDR</name>
<value>0x0000000000000000</value>
Expand Down

0 comments on commit b725244

Please sign in to comment.