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Instruction machine check ISR updated
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Inside instruction machine check, srr0 contains the address which
caused the issue. Check if the addr falls in the seeprom range then
go for re-trying the operation, else go for halt.

CQ:SW441967

Change-Id: I9134b7fee37d629de49dd6a7a8e2fee96b3ff27f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66024
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Raja Das authored and sgupta2m committed Oct 31, 2018
1 parent 63f0f90 commit bbeb8d0
Showing 1 changed file with 5 additions and 7 deletions.
12 changes: 5 additions & 7 deletions src/sbefw/core/sbeirq.C
Original file line number Diff line number Diff line change
Expand Up @@ -166,7 +166,7 @@ uint32_t __max_i2c_reset_retrials = 3;
// bit 16-21
#define I2C_MODE_REG_PORT_BITS (0xFFFF03FFFFFFFFFFull)
// bit 8
#define I2C_MODE_FGAT_BIT (0x8000000000000000ull)
#define I2C_MODE_FGAT_BIT (0x0000000800000000ull)

#define POLL_BEFORE_I2C_RESET (25600)
#define I2C_CMD_COMPLETE_POLL (0x00003FFF)
Expand Down Expand Up @@ -199,15 +199,15 @@ extern "C" void i2c_reset()
value = I2CM_RESET_BIT;
PPE_STVD( reg_address, value);

// clear bit 16-21 of mode register
SBE_GLOBAL->i2cModeRegister &= I2C_MODE_REG_PORT_BITS;
// set enchanced mode - fgat bit - 28
SBE_GLOBAL->i2cModeRegister |= I2C_MODE_FGAT_BIT;

for( auto port=0; port < 2; port++ )
{
// write mode register - 0x000A0006
reg_address = PU_MODE_REGISTER_B;
// set port number in bits 16-21 of mode register
SBE_GLOBAL->i2cModeRegister &= I2C_MODE_REG_PORT_BITS;
SBE_GLOBAL->i2cModeRegister |= ((uint64_t)port << 42);
PPE_STVD( reg_address, SBE_GLOBAL->i2cModeRegister );

Expand Down Expand Up @@ -384,8 +384,8 @@ extern "C" void __sbe_machine_check_handler()
"mtsrr0 %r4\n"
"b __exit\n"
"__instruction_machine_check:\n"
"# The EDR contains the address that caused the machine check\n"
"mfedr %r4\n"
"# The srr0 contains the address that caused the instruction machine check\n"
"mfsrr0 %r4\n"
"srawi %r4, %r4, 16\n"
"# If the address is not SEEPROM address, go for halt\n");
asm(
Expand Down Expand Up @@ -420,5 +420,3 @@ extern "C" void __sbe_machine_check_handler()
"rfi\n"
);
}


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