Add PHY sequencer refresh settings after draminit

Change-Id: I2fd7738f8909c3567c6cda8640bbe9d70b62bda3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39757
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69802
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -3175,4 +3175,20 @@
         <mssAccessorName>rtt_nom_override_disable</mssAccessorName>
     </attribute>
 
+    <attribute>
+        <id>ATTR_MSS_PHY_SEQ_REFRESH</id>
+        <targetType>TARGET_TYPE_MCS</targetType>
+        <description>
+          Controls ENABLE/DISABLE of workaround that sets
+          the PHY sequencer to trigger refresh after draminit.
+        </description>
+        <initToZero></initToZero>
+        <valueType>uint8</valueType>
+        <writeable/>
+        <enum>DISABLE = 0, ENABLE = 1</enum>
+        <mssUnits> bool </mssUnits>
+        <array> 2 </array>
+        <mssAccessorName>phy_seq_refresh</mssAccessorName>
+    </attribute>
+
 </attributes>