p9_tp_stopclocks: Don't raise CFAM FENCE2 to keep PERV chiplet access…

…ible

Change-Id: I402c713589d2538ec20da02f6f21d5a6aadc45f3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42094
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42095
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C

@@ -157,7 +157,7 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
         //CFAM.ROOT_CTRL0.FENCE[0..6]_DC = 1
         l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE0_DC>();
         l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE1_DC>();
-        l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE2_DC>();
+        // Not raising PERV_ROOT_CTRL0_FENCE2_DC because we need FSI2PIB <- PERV EPS connectivity
         l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE3_DC>();
         l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE4_DC>();
         l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE5_DC>();