Fence all chip-ops in QUIESCE state

Change-Id: I42ffb9db5503ad36636a989d54041220e159e6fc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57793 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
open-power · May 15, 2018 · e3dd8fa · e3dd8fa
1 parent af40291
commit e3dd8fa
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Showing 6 changed files with 24 additions and 31 deletions.
diff --git a/src/sbefw/core/chipop_handler.C b/src/sbefw/core/chipop_handler.C
@@ -6,6 +6,7 @@
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
 /* Contributors Listed Below - COPYRIGHT 2017,2018                        */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
@@ -189,8 +190,8 @@ sbeChipOpRc_t sbeIsCmdAllowed (const uint8_t i_cmdClass,
 
                 case SBE_STATE_QUIESCE:
                 {
-                    l_ret = ((l_pCmd->cmd_state_fence &
-                              SBE_FENCE_AT_QUIESCE)? false:true);
+                    // fence off all the chip-ops in quiesce state
+                    l_ret = false;
                     break;
                 }
 
@@ -206,7 +207,8 @@ sbeChipOpRc_t sbeIsCmdAllowed (const uint8_t i_cmdClass,
             }
             // Check if the command is allowed in current security mode
             if((SBE_GLOBAL->sbeFWSecurityEnabled)
-                && (SBE_FENCE_AT_SECURE_MODE & l_pCmd->cmd_state_fence))
+                && (SBE_FENCE_AT_SECURE_MODE & l_pCmd->cmd_state_fence)
+                && (!SBE::isSimicsRunning()))
             {
                 retRc.primStatus = SBE_PRI_UNSECURE_ACCESS_DENIED;
                 retRc.secStatus  = SBE_SEC_BLACKLISTED_CHIPOP_ACCESS;

diff --git a/src/sbefw/core/sbecmdprocessor.C b/src/sbefw/core/sbecmdprocessor.C
@@ -145,6 +145,10 @@ void sbeHandleFifoResponse (const uint32_t i_rc)
         {
             l_primStatus = SBE_PRI_INVALID_DATA;
         }
+        else if (i_rc == SBE_SEC_COMMAND_NOT_ALLOWED_IN_THIS_STATE)
+        {
+            l_primStatus = SBE_PRI_INVALID_COMMAND;
+        }
 
         uint32_t l_len2dequeue            = 0;
         sbeRespGenHdr_t l_hdr;

diff --git a/src/sbefw/core/sbecmdreceiver.C b/src/sbefw/core/sbecmdreceiver.C
@@ -223,7 +223,7 @@ void sbeCommandReceiver_routine(void *i_pArg)
             // of command, but there might be contention on the response sent
             // over FIFO/Mailbox usage.
             sbeChipOpRc_t cmdAllowedStatus = sbeIsCmdAllowed(l_cmdClass, l_command);
-            if( !cmdAllowedStatus.success() && !SBE::isSimicsRunning() )
+            if( !cmdAllowedStatus.success() )
             {
                 SBE_ERROR("Chip-Op CmdClass[0x%02X] Cmd[0x%02X] not allowed "
                     "secondary status[0x%04X] State - [0x%02X]",

diff --git a/src/test/testcases/testMemUtil.py b/src/test/testcases/testMemUtil.py
@@ -5,7 +5,7 @@
 #
 # OpenPOWER sbe Project
 #
-# Contributors Listed Below - COPYRIGHT 2017
+# Contributors Listed Below - COPYRIGHT 2017,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -149,7 +149,7 @@ def getmem(addr, len, flags):
     testUtil.readEot( )
     return data[:lenExp]
 
-def getmem_failure(addr, len, flags, responseWord):
+def getmem_failure(addr, len, flags, responseWord, withLen = True):
     testUtil.runCycles( 10000000 )
     req = (getsingleword(6)
          + [0, 0, 0xA4, 0x01]
@@ -158,7 +158,10 @@ def getmem_failure(addr, len, flags, responseWord):
          + getsingleword(len))
     testUtil.writeUsFifo(req)
     testUtil.writeEot( )
-    expResp =  ([0x0, 0x0, 0x0, 0x0]
+    lenWord = []
+    if withLen:
+        lenWord = [0x0, 0x0, 0x0, 0x0]
+    expResp =  (lenWord
     + [0xc0,0xde,0xa4,0x01]
     + getsingleword(responseWord)
     + [0x0,0x0,0x0,0x03])

diff --git a/src/test/testcases/testQuiesce.py b/src/test/testcases/testQuiesce.py
@@ -5,7 +5,8 @@
 #
 # OpenPOWER sbe Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2016
+# Contributors Listed Below - COPYRIGHT 2015,2018
+# [+] International Business Machines Corp.
 #
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -24,6 +25,7 @@
 import sys
 sys.path.append("targets/p9_nimbus/sbeTest" )
 import testUtil
+import testMemUtil
 err = False
 
 TESTDATA = [0,0,0,2,
@@ -43,6 +45,9 @@ def main( ):
     testUtil.readDsFifo( EXPDATA )
     testUtil.readEot( )
 
+    # fail get mem in quiesce state
+    testMemUtil.getmem_failure(0x08000000, 128*2, 0x02, 0x00010008, False)
+
 #-------------------------------------------------
 # Calling all test code
 #-------------------------------------------------

diff --git a/src/test/testcases/testQuiesce.xml b/src/test/testcases/testQuiesce.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER sbe Project                                                  -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -28,25 +28,4 @@
       <testcase>
           <simcmd>run-python-file targets/p9_nimbus/sbeTest/testQuiesce.py</simcmd>
           <exitonerror>yes</exitonerror>
-      </testcase>
-      <!-- A Get Capabilities chip-op should succeed post the Quiesce  -->
-      <testcase>
-          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testGetCapabilities.py</simcmd>
-          <exitonerror>yes</exitonerror>
-      </testcase>
-      <!-- A GetScom/PutScom chip-op should succeed post the Quiesce  -->
-      <testcase>
-          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutGetScom.py</simcmd>
-          <exitonerror>yes</exitonerror>
-      </testcase>
-      <!-- Taking out this test-case since this requires clock now, and we have
-           already done stop clock before quiesce. Somehow there is dependency
-           of clock with ADU, this used to work in DD1.
-           We can't move stopclock testcase below this since stop clock is from
-           seeprom region and quiesce prohibits seeprom access.
-           Disabling ADU access after quiesce operation. -->
-      <!-- An Adu put chip-op should succeed post the Quiesce  -->
-      <!--<testcase>
-          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testAduMem_noEccNoItag.py</simcmd>
-          <exitonerror>yes</exitonerror>
-      </testcase> -->
+      </testcase>