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NX: Add NX coprocessor init opal call
The read offset (4:11) in Receive FIFO control register is incremented by FIFO size whenever CRB read by NX. But the index in RxFIFO has to match with the corresponding entry in FIFO maintained by VAS in kernel. VAS entry is reset to 0 when opening the receive window during driver initialization. So when NX842 is reloaded or in kexec boot, possibility of mismatch between RxFIFO control register and VAS entries in kernel. It could cause CRB failure / timeout from NX. This patch adds nx_coproc_init opal call for kernel to initialize readOffset (4:11) and Queued (15:23) in RxFIFO control register. Fixes: 3b3c596 ("NX: Add P9 NX support for 842 compression engine") CC: stable # v5.8+ Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Original file line number | Diff line number | Diff line change |
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.. _opal_nx_coproc_init: | ||
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OPAL_NX_COPROC_INIT | ||
=================== | ||
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This OPAL call resets read offset and queued entries in high and normal | ||
priority receive FIFO control registers. The kernel initializes read | ||
offset entry in RXFIFO that it maintains during initialization. So this | ||
register reset is needed for NX module reload or in kexec boot to make sure | ||
read offset value matches with kernel entries. Otherwise NX reads requests | ||
with wrong offset in RxFIFO which could cause NX request failures. | ||
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The kernel initiates this call for each coprocessor type such as 842 and | ||
GZIP per NX instance. | ||
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Arguments | ||
--------- | ||
:: | ||
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``uint32_t chip_id`` | ||
Contains value of the chip number identified at boot time. | ||
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``uint32_t pid`` | ||
Contains NX coprocessor type (pid from the device tree). | ||
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Returns | ||
------- | ||
OPAL_SUCCESS | ||
The call to reset readOffset and queued entries for high and normal | ||
FIFOs was successful. | ||
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OPAL_PARAMETER | ||
Indicates invalid chip ID or NX coprocessor type. | ||
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OPAL_UNSUPPORTED | ||
Not supported on P7 and P8. |
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