phb4: Disable nodal scoped DMA accesses when PB pump mode is enabled

By default when a PCIe device issues a read request via the PHB it is first
issued with nodal scope. When accessing GPU memory the NPU does not know at the
time of response if the requested memory page is off node or not. Therefore
every read of GPU memory by a PHB is retried with larger scope which introduces
bandwidth and latency issues.

On smaller boxes which have pump mode enabled nodal and group scoped reads are
treated the same and both types of request are broadcast to one chip. Therefore
we can avoid the retry by disabling nodal scope on the PHB for these boxes. On
larger boxes nodal (single chip) and group (multiple chip) scoped reads are
treated differently. Therefore we avoid disabling nodal scope on large boxes
which have pump mode disabled to avoid all PHB requests being broadcast to
multiple chips.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>

hw/phb4.c

@@ -3983,6 +3983,17 @@ static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number,
 			 XPEC_NEST_PBCQ_HW_CONFIG_PBINIT,
 			 XPEC_NEST_PBCQ_HW_CONFIG_PBINIT);
 
+	/* If pump mode is enabled don't do nodal broadcasts.
+	 */
+	xscom_read(p->chip_id, PB_CENT_HP_MODE_CURR, &reg);
+	if (reg & PB_CFG_PUMP_MODE) {
+		reg = XPEC_NEST_PBCQ_HW_CONFIG_DIS_NODAL;
+		reg |= XPEC_NEST_PBCQ_HW_CONFIG_DIS_RNNN;
+		xscom_write_mask(p->chip_id,
+				 p->pe_xscom + XPEC_NEST_PBCQ_HW_CONFIG,
+				 reg, reg);
+	}
+
 	/* PEC Phase 4 (PHB) registers adjustment
 	 * Inbound CAPP traffic: The CAPI can send both CAPP packets and
 	 * I/O packets. A PCIe packet is indentified as a CAPP packet in

include/phb4-regs.h

@@ -344,6 +344,8 @@
 #define XPEC_NEST_PBCQ_HW_CONFIG		0x0
 #define   XPEC_NEST_PBCQ_HW_CONFIG_PBINIT	PPC_BIT(12)
 #define   XPEC_NEST_PBCQ_HW_CONFIG_CH_STR	PPC_BIT(33)
+#define   XPEC_NEST_PBCQ_HW_CONFIG_DIS_NODAL	PPC_BIT(50)
+#define   XPEC_NEST_PBCQ_HW_CONFIG_DIS_RNNN	PPC_BIT(52)
 #define XPEC_NEST_CAPP_CNTL			0x7
 
 /* Nest base per-stack registers */