xive: Ensure VC informational FIRs are masked

Some HostBoot versions leave those as checkstop, they are harmless and can sometimes occur during normal operations. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
open-power · Dec 12, 2017 · 84febad · 84febad
1 parent 1e00d54
commit 84febad
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Showing 2 changed files with 11 additions and 0 deletions.
diff --git a/hw/xive.c b/hw/xive.c
@@ -1770,6 +1770,11 @@ static bool xive_config_init(struct xive *x)
 	val |= VC_EQC_CONF_ENABLE_END_u_BIT;
 	xive_regw(x, VC_EQC_CONFIG, val);
 
+	/* Disable error reporting in the FIR for info errors
+	 * from the VC.
+	 */
+	xive_regw(x, CQ_FIRMASK_OR, 3ull);
+
 	return true;
 }
 

diff --git a/include/xive.h b/include/xive.h
@@ -70,6 +70,12 @@
 #define CQ_AIB_CTL		0x110
 #define X_CQ_RST_CTL		0x23
 #define CQ_RST_CTL		0x118
+#define X_CQ_FIRMASK		0x33
+#define CQ_FIRMASK		0x198
+#define X_CQ_FIRMASK_AND	0x34
+#define CQ_FIRMASK_AND		0x1a0
+#define X_CQ_FIRMASK_OR		0x35
+#define CQ_FIRMASK_OR		0x1a8
 
 /* PC LBS1 register offsets */
 #define X_PC_TCTXT_CFG		0x100