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core/pci: Only hack class code for root ports
Currently we apply a hack to devices directly under a PHB which sets the class code shown in the DT to that of a generic PCI-PCI bridge. This is done to work around a bug in some IBM PHBs where the root port had an incorrect class code. This has the side effect of forcing the class code of any devices on a root bus to that of a PCI-PCI bridge including NVLink and OpenCAPI devices which causes them to be mis-labed in the Skiboot PCI Summary. Fix this by only appling the hack to PCIe devices that are marked as root ports and add a description string for the 0680 class code that we use for nvlink device. Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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