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fix simple sparse warnings
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Should be no real code change, these mostly update type declarations
that sparse complains about.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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npiggin authored and oohal committed Dec 16, 2019
1 parent 5178691 commit e04a34a
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Showing 14 changed files with 20 additions and 19 deletions.
4 changes: 2 additions & 2 deletions core/init.c
Expand Up @@ -531,7 +531,7 @@ static int64_t cpu_disable_ME_RI_all(void)
return OPAL_SUCCESS;
}

void *fdt;
static void *fdt;

void __noreturn load_and_boot_kernel(bool is_reboot)
{
Expand Down Expand Up @@ -828,7 +828,7 @@ static void setup_branch_null_catcher(void)
* ABI v1 (ie. big endian). This will be broken if we ever
* move to ABI v2 (ie little endian)
*/
memcpy_null(0, bn, 16);
memcpy_null((void *)0, bn, 16);
}
#endif

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2 changes: 1 addition & 1 deletion core/pci.c
Expand Up @@ -1349,7 +1349,7 @@ void pci_std_swizzle_irq_map(struct dt_node *np,
dt_add_property_cells(np, "interrupt-map-mask",
0xf800, 0, 0, 7);
}
map_size = esize * edevcount * 4 * sizeof(uint32_t);
map_size = esize * edevcount * 4 * sizeof(u32);
map = p = zalloc(map_size);
if (!map) {
prerror("Failed to allocate interrupt-map-mask !\n");
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2 changes: 1 addition & 1 deletion core/platform.c
Expand Up @@ -184,7 +184,7 @@ static int generic_start_preload_resource(enum resource_id id, uint32_t subid,
}

/* These values will work for a ZZ booted using BML */
const struct platform_ocapi generic_ocapi = {
static const struct platform_ocapi generic_ocapi = {
.i2c_engine = 1,
.i2c_port = 4,
.i2c_reset_addr = 0x20,
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2 changes: 1 addition & 1 deletion hdata/tpmrel.c
Expand Up @@ -118,7 +118,7 @@ static struct dt_node *get_hb_reserved_memory(const char *label)
return NULL;
}

struct {
static struct {
uint32_t type;
const char *compat;
} cvc_services[] = {
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2 changes: 1 addition & 1 deletion hw/fsp/fsp-dpo.c
Expand Up @@ -18,7 +18,7 @@
#define DPO_CMD_SGN_BYTE1 0x20 /* Byte[1] signature */
#define DPO_TIMEOUT 2700 /* 45 minutes in seconds */

bool fsp_dpo_pending;
static bool fsp_dpo_pending;
static unsigned long fsp_dpo_init_tb;

/*
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4 changes: 2 additions & 2 deletions hw/imc.c
Expand Up @@ -455,8 +455,8 @@ static void imc_dt_update_nest_node(struct dt_node *dev)
const struct dt_property *type;

/* Add the base_addr and chip-id properties for the nest node */
base_addr = malloc(sizeof(uint64_t) * nr_chip);
chipids = malloc(sizeof(uint32_t) * nr_chip);
base_addr = malloc(sizeof(u64) * nr_chip);
chipids = malloc(sizeof(u32) * nr_chip);
for_each_chip(chip) {
base_addr[i] = cpu_to_be64(chip->homer_base);
chipids[i] = cpu_to_be32(chip->id);
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2 changes: 1 addition & 1 deletion hw/vas.c
Expand Up @@ -494,7 +494,7 @@ static int init_vas_inst(struct dt_node *np, bool enable)

}

void vas_init()
void vas_init(void)
{
bool enabled;
struct dt_node *np;
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3 changes: 2 additions & 1 deletion include/device.h
Expand Up @@ -118,7 +118,8 @@ struct dt_property *__dt_add_property_u64s(struct dt_node *node,
static inline struct dt_property *dt_add_property_u64(struct dt_node *node,
const char *name, u64 val)
{
return dt_add_property_cells(node, name, (u32)(val >> 32), (u32)val);
return dt_add_property_cells(node, name, (u32)(val >> 32),
(u32)(val & 0xffffffffUL));
}

void dt_del_property(struct dt_node *node, struct dt_property *prop);
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2 changes: 1 addition & 1 deletion include/skiboot.h
Expand Up @@ -318,7 +318,7 @@ extern void fake_rtc_init(void);
struct stack_frame;
extern void exception_entry(struct stack_frame *stack);
extern void exception_entry_pm_sreset(void);
extern void exception_entry_pm_mce(void);
extern void __noreturn exception_entry_pm_mce(void);

/* Assembly in head.S */
extern void disable_machine_check(void);
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2 changes: 1 addition & 1 deletion libc/stdlib/labs.c
Expand Up @@ -19,7 +19,7 @@
* Returns the absolute value of the long integer argument
*/

long int labs(long int n)
long int __attribute__((const)) labs(long int n)
{
return (n > 0) ? n : -n;
}
4 changes: 2 additions & 2 deletions platforms/astbmc/common.c
Expand Up @@ -503,13 +503,13 @@ void astbmc_exit(void)
ipmi_wdt_final_reset();
}

const struct bmc_sw_config bmc_sw_ami = {
static const struct bmc_sw_config bmc_sw_ami = {
.ipmi_oem_partial_add_esel = IPMI_CODE(0x3a, 0xf0),
.ipmi_oem_pnor_access_status = IPMI_CODE(0x3a, 0x07),
.ipmi_oem_hiomap_cmd = IPMI_CODE(0x3a, 0x5a),
};

const struct bmc_sw_config bmc_sw_openbmc = {
static const struct bmc_sw_config bmc_sw_openbmc = {
.ipmi_oem_partial_add_esel = IPMI_CODE(0x3a, 0xf0),
.ipmi_oem_hiomap_cmd = IPMI_CODE(0x3a, 0x5a),
};
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2 changes: 1 addition & 1 deletion platforms/astbmc/p8dtu.c
Expand Up @@ -223,7 +223,7 @@ static const struct bmc_sw_config bmc_sw_smc = {
};

/* Provided by Eric Chen (SMC) */
const struct bmc_hw_config p8dtu_bmc_hw = {
static const struct bmc_hw_config p8dtu_bmc_hw = {
.scu_revision_id = 0x02010303,
.mcr_configuration = 0x00000577,
.mcr_scu_mpll = 0x000050c0,
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2 changes: 1 addition & 1 deletion platforms/astbmc/p9dsu.c
Expand Up @@ -695,7 +695,7 @@ static const struct bmc_sw_config bmc_sw_smc = {
};

/* Provided by Eric Chen (SMC) */
const struct bmc_hw_config p9dsu_bmc_hw = {
static const struct bmc_hw_config p9dsu_bmc_hw = {
.scu_revision_id = 0x04030303,
.mcr_configuration = 0x11000756,
.mcr_scu_mpll = 0x000071c1,
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6 changes: 3 additions & 3 deletions platforms/astbmc/witherspoon.c
Expand Up @@ -325,7 +325,7 @@ static void witherspoon_npu2_device_detect(struct npu2 *npu)
return;
}

const struct platform_ocapi witherspoon_ocapi = {
static const struct platform_ocapi witherspoon_ocapi = {
.i2c_engine = 1,
.i2c_port = 4,
.odl_phy_swap = false,
Expand Down Expand Up @@ -370,8 +370,8 @@ static int gpu_slot_to_num(const char *slot)

static void npu2_phb_nvlink_dt(struct phb *npuphb)
{
struct dt_node *g[3] = { 0 }; /* Current maximum is 3 GPUs per 1 NPU */
struct dt_node *n[6] = { 0 };
struct dt_node *g[3] = { NULL }; /* Current maximum 3 GPUs per 1 NPU */
struct dt_node *n[6] = { NULL };
int max_gpus, i, gpuid, first, last;
struct npu2 *npu2_phb = phb_to_npu2_nvlink(npuphb);
struct pci_device *npd;
Expand Down

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