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sdr.c
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sdr.c
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// Author: Xianjun Jiao, Michael Mehari, Wei Liu, Jetmir Haxhibeqiri, Pablo Avila Campos
// SPDX-FileCopyrightText: 2022 UGent
// SPDX-License-Identifier: AGPL-3.0-or-later
#include <linux/bitops.h>
#include <linux/dmapool.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/of_irq.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/dmaengine.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/of_dma.h>
#include <linux/platform_device.h>
#include <linux/random.h>
#include <linux/slab.h>
#include <linux/wait.h>
#include <linux/sched/task.h>
#include <linux/dma/xilinx_dma.h>
#include <linux/spi/spi.h>
#include <net/mac80211.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/gpio.h>
#include <linux/leds.h>
// #include <linux/time.h>
#define IIO_AD9361_USE_PRIVATE_H_
#include <../../drivers/iio/adc/ad9361_regs.h>
#include <../../drivers/iio/adc/ad9361.h>
#include <../../drivers/iio/adc/ad9361_private.h>
#include <../../drivers/iio/frequency/cf_axi_dds.h>
extern int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num);
extern int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
bool tx1, bool tx2, bool immed);
extern int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
struct ctrl_outs_control *ctrl);
extern int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg);
#include "../user_space/sdrctl_src/nl80211_testmode_def.h"
#include "hw_def.h"
#include "sdr.h"
#include "git_rev.h"
// driver API of component driver
extern struct tx_intf_driver_api *tx_intf_api;
extern struct rx_intf_driver_api *rx_intf_api;
extern struct openofdm_tx_driver_api *openofdm_tx_api;
extern struct openofdm_rx_driver_api *openofdm_rx_api;
extern struct xpu_driver_api *xpu_api;
u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes);
u8 gen_mpdu_delim_crc(u16 m);
u32 reverse32(u32 d);
static int openwifi_set_antenna(struct ieee80211_hw *dev, u32 tx_ant, u32 rx_ant);
static int openwifi_get_antenna(struct ieee80211_hw *dev, u32 *tx_ant, u32 *rx_ant);
int rssi_half_db_to_rssi_dbm(int rssi_half_db, int rssi_correction);
int rssi_dbm_to_rssi_half_db(int rssi_dbm, int rssi_correction);
int rssi_correction_lookup_table(u32 freq_MHz);
void ad9361_tx_calibration(struct openwifi_priv *priv, u32 actual_tx_lo);
void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 actual_rx_lo);
#include "sdrctl_intf.c"
#include "sysfs_intf.c"
static int test_mode = 0; // bit0: aggregation enable(1)/disable(0); NO USE ANY MORE: bit1: tx offset tuning enable(0)/disable(1)
// Internal indication variables after parsing test_mode
static bool AGGR_ENABLE = false;
static bool TX_OFFSET_TUNING_ENABLE = false;
static int init_tx_att = 0;
MODULE_AUTHOR("Xianjun Jiao");
MODULE_DESCRIPTION("SDR driver");
MODULE_LICENSE("GPL v2");
module_param(test_mode, int, 0);
MODULE_PARM_DESC(myint, "test_mode. bit0: aggregation enable(1)/disable(0)");
module_param(init_tx_att, int, 0);
MODULE_PARM_DESC(myint, "init_tx_att. TX attenuation in dB*1000 example: set to 3000 for 3dB attenuation");
// ---------------rfkill---------------------------------------
static bool openwifi_is_radio_enabled(struct openwifi_priv *priv)
{
int reg;
if (priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT0 || priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0 || priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT_BOTH)
reg = ad9361_get_tx_atten(priv->ad9361_phy, 1);
else
reg = ad9361_get_tx_atten(priv->ad9361_phy, 2);
if (reg == (AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT]))
return true;// 0 off, 1 on
return false;
}
void openwifi_rfkill_init(struct ieee80211_hw *hw)
{
struct openwifi_priv *priv = hw->priv;
priv->rfkill_off = openwifi_is_radio_enabled(priv);
printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off");
wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off);
wiphy_rfkill_start_polling(hw->wiphy);
}
void openwifi_rfkill_poll(struct ieee80211_hw *hw)
{
bool enabled;
struct openwifi_priv *priv = hw->priv;
enabled = openwifi_is_radio_enabled(priv);
// printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off");
if (unlikely(enabled != priv->rfkill_off)) {
priv->rfkill_off = enabled;
printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off");
wiphy_rfkill_set_hw_state(hw->wiphy, !enabled);
}
}
void openwifi_rfkill_exit(struct ieee80211_hw *hw)
{
printk("%s openwifi_rfkill_exit\n", sdr_compatible_str);
wiphy_rfkill_stop_polling(hw->wiphy);
}
//----------------rfkill end-----------------------------------
inline int rssi_dbm_to_rssi_half_db(int rssi_dbm, int rssi_correction)
{
return ((rssi_correction+rssi_dbm)<<1);
}
inline int rssi_correction_lookup_table(u32 freq_MHz)
{
int rssi_correction;
if (freq_MHz<2412) {
rssi_correction = 153;
} else if (freq_MHz<=2484) {
rssi_correction = 153;
} else if (freq_MHz<5160) {
rssi_correction = 153;
} else if (freq_MHz<=5240) {
rssi_correction = 145;
} else if (freq_MHz<=5320) {
rssi_correction = 145;
} else {
rssi_correction = 145;
}
return rssi_correction;
}
inline void ad9361_tx_calibration(struct openwifi_priv *priv, u32 actual_tx_lo)
{
// struct timespec64 tv;
// unsigned long time_before = 0;
// unsigned long time_after = 0;
u32 spi_disable;
priv->last_tx_quad_cal_lo = actual_tx_lo;
// do_gettimeofday(&tv);
// time_before = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
spi_disable = xpu_api->XPU_REG_SPI_DISABLE_read(); // backup current fpga spi disable state
xpu_api->XPU_REG_SPI_DISABLE_write(1); // disable FPGA SPI module
ad9361_do_calib_run(priv->ad9361_phy, TX_QUAD_CAL, (int)priv->ad9361_phy->state->last_tx_quad_cal_phase);
xpu_api->XPU_REG_SPI_DISABLE_write(spi_disable); // restore original SPI disable state
// do_gettimeofday(&tv);
// time_after = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
// printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration %lu us\n", sdr_compatible_str, actual_tx_lo, time_after-time_before);
printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration unknown us\n", sdr_compatible_str, actual_tx_lo);
}
inline void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 actual_rx_lo)
{
int static_lbt_th, auto_lbt_th, fpga_lbt_th, receiver_rssi_dbm_th, receiver_rssi_th;
// get rssi correction value from lookup table
priv->rssi_correction = rssi_correction_lookup_table(actual_rx_lo);
// set appropriate lbt threshold
auto_lbt_th = rssi_dbm_to_rssi_half_db(-62, priv->rssi_correction); // -62dBm
static_lbt_th = rssi_dbm_to_rssi_half_db(-(priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]), priv->rssi_correction);
fpga_lbt_th = (priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]==0?auto_lbt_th:static_lbt_th);
xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th);
priv->last_auto_fpga_lbt_th = auto_lbt_th;
// Set rssi_half_db threshold (-85dBm equivalent) to receiver. Receiver will not react to signal lower than this rssi. See test records (OPENOFDM_RX_POWER_THRES_INIT in hw_def.h)
receiver_rssi_dbm_th = (priv->drv_rx_reg_val[DRV_RX_REG_IDX_DEMOD_TH]==0?OPENOFDM_RX_RSSI_DBM_TH_DEFAULT:(-priv->drv_rx_reg_val[DRV_RX_REG_IDX_DEMOD_TH]));
receiver_rssi_th = rssi_dbm_to_rssi_half_db(receiver_rssi_dbm_th, priv->rssi_correction);
openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write((OPENOFDM_RX_DC_RUNNING_SUM_TH_INIT<<16)|receiver_rssi_th);
if (actual_rx_lo < 2500) {
if (priv->band != BAND_2_4GHZ) {
priv->band = BAND_2_4GHZ;
xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) );
}
} else {
if (priv->band != BAND_5_8GHZ) {
priv->band = BAND_5_8GHZ;
xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) );
}
}
printk("%s openwifi_rf_rx_update_after_tuning %dMHz rssi_correction %d fpga_lbt_th %d(%ddBm) auto %d static %d receiver th %d(%ddBm)\n", sdr_compatible_str,
actual_rx_lo, priv->rssi_correction, fpga_lbt_th, rssi_half_db_to_rssi_dbm(fpga_lbt_th, priv->rssi_correction), auto_lbt_th, static_lbt_th, receiver_rssi_th, receiver_rssi_dbm_th);
}
static void ad9361_rf_set_channel(struct ieee80211_hw *dev,
struct ieee80211_conf *conf)
{
struct openwifi_priv *priv = dev->priv;
u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz;
u32 actual_tx_lo;
u32 diff_tx_lo;
bool change_flag = (actual_rx_lo != priv->actual_rx_lo);
if (change_flag && priv->rf_reg_val[RF_TX_REG_IDX_FREQ_MHZ]==0 && priv->rf_reg_val[RF_RX_REG_IDX_FREQ_MHZ]==0) {
actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz;
diff_tx_lo = priv->last_tx_quad_cal_lo > actual_tx_lo ? priv->last_tx_quad_cal_lo - actual_tx_lo : actual_tx_lo - priv->last_tx_quad_cal_lo;
// -------------------Tx Lo tuning-------------------
clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo) )>>1);
priv->actual_tx_lo = actual_tx_lo;
// -------------------Rx Lo tuning-------------------
clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo) )>>1);
priv->actual_rx_lo = actual_rx_lo;
// call Tx Quadrature calibration if frequency change is more than 100MHz
if (diff_tx_lo > 100)
ad9361_tx_calibration(priv, actual_tx_lo);
openwifi_rf_rx_update_after_tuning(priv, actual_rx_lo);
printk("%s ad9361_rf_set_channel %dMHz done\n", sdr_compatible_str,conf->chandef.chan->center_freq);
}
}
const struct openwifi_rf_ops ad9361_rf_ops = {
.name = "ad9361",
// .init = ad9361_rf_init,
// .stop = ad9361_rf_stop,
.set_chan = ad9361_rf_set_channel,
// .calc_rssi = ad9361_rf_calc_rssi,
};
u16 reverse16(u16 d) {
union u16_byte2 tmp0, tmp1;
tmp0.a = d;
tmp1.c[0] = tmp0.c[1];
tmp1.c[1] = tmp0.c[0];
return(tmp1.a);
}
u32 reverse32(u32 d) {
union u32_byte4 tmp0, tmp1;
tmp0.a = d;
tmp1.c[0] = tmp0.c[3];
tmp1.c[1] = tmp0.c[2];
tmp1.c[2] = tmp0.c[1];
tmp1.c[3] = tmp0.c[0];
return(tmp1.a);
}
static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx)
{
struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]);
int i;
ring->stop_flag = -1;
ring->bd_wr_idx = 0;
ring->bd_rd_idx = 0;
ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL);
if (ring->bds==NULL) {
printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str);
return -ENOMEM;
}
for (i = 0; i < NUM_TX_BD; i++) {
ring->bds[i].skb_linked=NULL; // for tx, skb is from upper layer
//at first right after skb allocated, head, data, tail are the same.
ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine
ring->bds[i].seq_no = 0xffff; // invalid value
ring->bds[i].prio = 0xff; // invalid value
ring->bds[i].len_mpdu = 0; // invalid value
}
return 0;
}
static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx)
{
struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]);
int i;
ring->stop_flag = -1;
ring->bd_wr_idx = 0;
ring->bd_rd_idx = 0;
for (i = 0; i < NUM_TX_BD; i++) {
if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0)
continue;
if (ring->bds[i].dma_mapping_addr != 0)
dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV);
// if (ring->bds[i].skb_linked!=NULL)
// dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception
if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) ||
(ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0))
printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str,
ring_idx, i, (void*)(ring->bds[i].skb_linked), (unsigned int)(ring->bds[i].dma_mapping_addr));
ring->bds[i].skb_linked=NULL;
ring->bds[i].dma_mapping_addr = 0;
ring->bds[i].seq_no = 0xffff; // invalid value
ring->bds[i].prio = 0xff; // invalid value
ring->bds[i].len_mpdu = 0; // invalid value
}
if (ring->bds)
kfree(ring->bds);
ring->bds = NULL;
}
static int openwifi_init_rx_ring(struct openwifi_priv *priv)
{
int i;
u8 *pdata_tmp;
priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL);
if (!priv->rx_cyclic_buf) {
printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str);
dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr);
return(-1);
}
// Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA
for (i=0; i<NUM_RX_BD; i++) {
pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning
(*((u16*)(pdata_tmp+10))) = 0;
}
printk("%s openwifi_init_rx_ring: NUM_RX_BD %d RX_BD_BUF_SIZE %d pkt existing flag are cleared!\n", sdr_compatible_str,
NUM_RX_BD, RX_BD_BUF_SIZE);
return 0;
}
static void openwifi_free_rx_ring(struct openwifi_priv *priv)
{
if (priv->rx_cyclic_buf)
dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr);
priv->rx_cyclic_buf_dma_mapping_addr = 0;
priv->rx_cyclic_buf = 0;
}
static int rx_dma_setup(struct ieee80211_hw *dev){
struct openwifi_priv *priv = dev->priv;
struct dma_device *rx_dev = priv->rx_chan->device;
priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT);
if (!(priv->rxd)) {
openwifi_free_rx_ring(priv);
printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd));
return(-1);
}
priv->rxd->callback = 0;
priv->rxd->callback_param = 0;
priv->rx_cookie = priv->rxd->tx_submit(priv->rxd);
if (dma_submit_error(priv->rx_cookie)) {
printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie));
return(-1);
}
dma_async_issue_pending(priv->rx_chan);
return(0);
}
inline int rssi_half_db_to_rssi_dbm(int rssi_half_db, int rssi_correction)
{
int rssi_db, rssi_dbm;
rssi_db = (rssi_half_db>>1);
rssi_dbm = rssi_db - rssi_correction;
rssi_dbm = (rssi_dbm < (-128)? (-128) : rssi_dbm);
return rssi_dbm;
}
static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id)
{
struct ieee80211_hw *dev = dev_id;
struct openwifi_priv *priv = dev->priv;
struct ieee80211_rx_status rx_status = {0};
struct sk_buff *skb;
struct ieee80211_hdr *hdr;
u32 addr1_low32, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0;//, fc_di;
bool ht_flag, short_gi, ht_aggr, ht_aggr_last;
// u32 dma_driver_buf_idx_mod;
u8 *pdata_tmp;
u8 fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw;
s8 signal;
u16 agc_status_and_pkt_exist_flag, rssi_half_db, addr1_high16, addr2_high16=0, addr3_high16=0, seq_no=0;
bool content_ok, len_overflow, is_unicast;
#ifdef USE_NEW_RX_INTERRUPT
int i;
spin_lock(&priv->lock);
for (i=0; i<NUM_RX_BD; i++) {
pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE;
agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); //check rx_intf_pl_to_m_axis.v. FPGA TODO: add pkt exist 1bit flag next to gpio_status_lock_by_sig_valid
if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer
continue;
#else
static u8 target_buf_idx_old = 0;
spin_lock(&priv->lock);
while(1) { // loop all rx buffers that have new rx packets
pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning
agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10)));
if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer
break;
#endif
tsft_low = (*((u32*)(pdata_tmp+0 )));
tsft_high = (*((u32*)(pdata_tmp+4 )));
rssi_half_db = (*((u16*)(pdata_tmp+8 )));
len = (*((u16*)(pdata_tmp+12)));
len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false);
rate_idx = (*((u16*)(pdata_tmp+14)));
ht_flag = ((rate_idx&0x10)!=0);
short_gi = ((rate_idx&0x20)!=0);
ht_aggr = (ht_flag & ((rate_idx&0x40)!=0));
ht_aggr_last = (ht_flag & ((rate_idx&0x80)!=0));
rate_idx = (rate_idx&0x1F);
fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) );
//phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1));
// phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation
// dma_driver_buf_idx_mod = (state.residue&0x7f);
fcs_ok = ((fcs_ok&0x80)!=0);
if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) {
// if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) {
// printk("%s openwifi_rx: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod);
// }
content_ok = true;
} else {
printk("%s openwifi_rx: WARNING content! len%d overflow%d rate_idx%d\n", sdr_compatible_str,
len, len_overflow, rate_idx);
content_ok = false;
}
signal = rssi_half_db_to_rssi_dbm(rssi_half_db, priv->rssi_correction);
hdr = (struct ieee80211_hdr *)(pdata_tmp+16);
if (len>=20) {
addr2_low32 = *((u32*)(hdr->addr2+2));
addr2_high16 = *((u16*)(hdr->addr2));
}
addr1_low32 = *((u32*)(hdr->addr1+2));
addr1_high16 = *((u16*)(hdr->addr1));
if ( priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&DMESG_LOG_ANY ) {
if (len>=26) {
addr3_low32 = *((u32*)(hdr->addr3+2));
addr3_high16 = *((u16*)(hdr->addr3));
}
if (len>=28)
seq_no = ( (hdr->seq_ctrl&IEEE80211_SCTL_SEQ)>>4 );
is_unicast = (addr1_low32!=0xffffffff || addr1_high16!=0xffff);
if ( (( is_unicast)&&(priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&DMESG_LOG_UNICAST)) ||
((!is_unicast)&&(priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&DMESG_LOG_BROADCAST)) ||
(( fcs_ok==0)&&(priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&DMESG_LOG_ERROR)) )
printk("%s openwifi_rx: %dB ht%daggr%d/%d sgi%d %dM FC%04x DI%04x ADDR%04x%08x/%04x%08x/%04x%08x SC%d fcs%d buf_idx%d %ddBm\n", sdr_compatible_str,
len, ht_flag, ht_aggr, ht_aggr_last, short_gi, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id,
reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32),
#ifdef USE_NEW_RX_INTERRUPT
seq_no, fcs_ok, i, signal);
#else
seq_no, fcs_ok, target_buf_idx_old, signal);
#endif
}
// priv->phy_rx_sn_hw_old = phy_rx_sn_hw;
if (content_ok) {
skb = dev_alloc_skb(len);
if (skb) {
skb_put_data(skb,pdata_tmp+16,len);
rx_status.antenna = priv->runtime_rx_ant_cfg;
// def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M)
rx_status.rate_idx = wifi_rate_table_mapping[rate_idx];
rx_status.signal = signal;
// rx_status.freq = dev->conf.chandef.chan->center_freq;
rx_status.freq = priv->actual_rx_lo;
// rx_status.band = dev->conf.chandef.chan->band;
rx_status.band = (rx_status.freq<2500?NL80211_BAND_2GHZ:NL80211_BAND_5GHZ);
rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) );
rx_status.flag |= RX_FLAG_MACTIME_START;
if (!fcs_ok)
rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
if (rate_idx <= 15)
rx_status.encoding = RX_ENC_LEGACY;
else
rx_status.encoding = RX_ENC_HT;
rx_status.bw = RATE_INFO_BW_20;
if (short_gi)
rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI;
if(ht_aggr)
{
rx_status.ampdu_reference = priv->ampdu_reference;
rx_status.flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
if (ht_aggr_last)
rx_status.flag |= RX_FLAG_AMPDU_IS_LAST;
}
memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more.
ieee80211_rx_irqsafe(dev, skb); // call mac80211 function
// printk("%s openwifi_rx: addr1_low32 %08x self addr %08x\n", sdr_compatible_str, addr1_low32, ( *( (u32*)(priv->mac_addr+2) ) ));
if (addr1_low32 == ( *( (u32*)(priv->mac_addr+2) ) ) && priv->stat.stat_enable) {
agc_status_and_pkt_exist_flag = (agc_status_and_pkt_exist_flag&0x7f);
if (len>=20) {// rx stat
if (addr2_low32 == priv->stat.rx_target_sender_mac_addr || priv->stat.rx_target_sender_mac_addr==0) {
if ( ieee80211_is_data(hdr->frame_control) ) {
priv->stat.rx_data_pkt_mcs_realtime = rate_idx;
priv->stat.rx_data_pkt_num_total++;
if (!fcs_ok) {
priv->stat.rx_data_pkt_num_fail++;
priv->stat.rx_data_pkt_fail_mcs_realtime = rate_idx;
priv->stat.rx_data_fail_agc_gain_value_realtime = agc_status_and_pkt_exist_flag;
} else {
priv->stat.rx_data_ok_agc_gain_value_realtime = agc_status_and_pkt_exist_flag;
}
} else if ( ieee80211_is_mgmt(hdr->frame_control) ) {
priv->stat.rx_mgmt_pkt_mcs_realtime = rate_idx;
priv->stat.rx_mgmt_pkt_num_total++;
if (!fcs_ok) {
priv->stat.rx_mgmt_pkt_num_fail++;
priv->stat.rx_mgmt_pkt_fail_mcs_realtime = rate_idx;
priv->stat.rx_mgmt_fail_agc_gain_value_realtime = agc_status_and_pkt_exist_flag;
} else {
priv->stat.rx_mgmt_ok_agc_gain_value_realtime = agc_status_and_pkt_exist_flag;
}
}
}
} else if ( ieee80211_is_ack(hdr->frame_control) ) {
priv->stat.rx_ack_pkt_mcs_realtime = rate_idx;
priv->stat.rx_ack_pkt_num_total++;
if (!fcs_ok) {
priv->stat.rx_ack_pkt_num_fail++;
} else {
priv->stat.rx_ack_ok_agc_gain_value_realtime = agc_status_and_pkt_exist_flag;
}
}
}
} else
printk("%s openwifi_rx: WARNING dev_alloc_skb failed!\n", sdr_compatible_str);
if(ht_aggr_last)
priv->ampdu_reference++;
}
(*((u16*)(pdata_tmp+10))) = 0; // clear the field (set by rx_intf_pl_to_m_axis.v) to indicate the packet has been processed
loop_count++;
#ifndef USE_NEW_RX_INTERRUPT
target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1));
#endif
}
if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&DMESG_LOG_ERROR) )
printk("%s openwifi_rx: WARNING loop_count %d\n", sdr_compatible_str,loop_count);
// openwifi_rx_out:
spin_unlock(&priv->lock);
return IRQ_HANDLED;
}
static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id)
{
struct ieee80211_hw *dev = dev_id;
struct openwifi_priv *priv = dev->priv;
struct openwifi_ring *ring, *drv_ring_tmp;
struct sk_buff *skb;
struct ieee80211_tx_info *info;
struct ieee80211_hdr *hdr;
u32 reg_val1, hw_queue_len, reg_val2, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0, addr1_low32, mcs_for_sysfs;
u16 seq_no, pkt_cnt, blk_ack_ssn, start_idx;
u8 nof_retx=-1, last_bd_rd_idx, i, prio, queue_idx, nof_retx_stat;
u64 blk_ack_bitmap;
// u16 prio_rd_idx_store[64]={0};
bool tx_fail=false, fpga_queue_has_room=false;
bool use_ht_aggr, pkt_need_ack, use_ht_rate, prio_wake_up_flag = false;
spin_lock(&priv->lock);
while(1) { // loop all packets that have been sent by FPGA
reg_val1 = tx_intf_api->TX_INTF_REG_PKT_INFO1_read();
reg_val2 = tx_intf_api->TX_INTF_REG_PKT_INFO2_read();
blk_ack_bitmap = (tx_intf_api->TX_INTF_REG_PKT_INFO3_read() | ((u64)tx_intf_api->TX_INTF_REG_PKT_INFO4_read())<<32);
if (reg_val1!=0xFFFFFFFF) {
nof_retx = (reg_val1&0xF);
last_bd_rd_idx = ((reg_val1>>5)&(NUM_TX_BD-1));
prio = ((reg_val1>>17)&0x3);
num_slot_random = ((reg_val1>>19)&0x1FF);
//num_slot_random = ((0xFF80000 ®_val1)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE));
cw = ((reg_val1>>28)&0xF);
//cw = ((0xF0000000 & reg_val1) >> 28);
if(cw > 10) {
cw = 10 ;
num_slot_random += 512 ;
}
pkt_cnt = (reg_val2&0x3F);
blk_ack_ssn = ((reg_val2>>6)&0xFFF);
queue_idx = ((reg_val1>>15)&(MAX_NUM_HW_QUEUE-1));
dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read();
hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read();
// check which linux prio is stopped by this queue (queue_idx)
for (i=0; i<MAX_NUM_SW_QUEUE; i++) {
drv_ring_tmp = &(priv->tx_ring[i]);
if ( drv_ring_tmp->stop_flag == prio ) {
if ( ((dma_fifo_no_room_flag>>i)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(i*8))&0xFF))>=RING_ROOM_THRESHOLD )
fpga_queue_has_room=true;
else
fpga_queue_has_room=false;
// Wake up Linux queue due to the current fpga queue releases some room
if( priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&DMESG_LOG_NORMAL_QUEUE_STOP )
printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio%d i%d queue%d no room flag%x hwq len%08x wr%d rd%d\n", sdr_compatible_str,
prio, i, queue_idx, dma_fifo_no_room_flag, hw_queue_len, drv_ring_tmp->bd_wr_idx, last_bd_rd_idx);
if (fpga_queue_has_room) {
prio_wake_up_flag = true;
drv_ring_tmp->stop_flag = -1;
if (priv->stat.stat_enable) {
priv->stat.tx_prio_wakeup_num[prio]++;
priv->stat.tx_queue_wakeup_num[i]++;
}
} else {
if( priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&DMESG_LOG_NORMAL_QUEUE_STOP )
printk("%s openwifi_tx_interrupt: WARNING no room! prio_wake_up_flag%d\n", sdr_compatible_str, prio_wake_up_flag);
}
}
}
if (prio_wake_up_flag)
ieee80211_wake_queue(dev, prio);
if (priv->stat.stat_enable) {
priv->stat.tx_prio_interrupt_num[prio] = priv->stat.tx_prio_interrupt_num[prio] + pkt_cnt;
priv->stat.tx_queue_interrupt_num[queue_idx] = priv->stat.tx_queue_interrupt_num[queue_idx] + pkt_cnt;
}
ring = &(priv->tx_ring[queue_idx]);
for(i = 1; i <= pkt_cnt; i++)
{
ring->bd_rd_idx = (last_bd_rd_idx + i - pkt_cnt + 64)%64;
seq_no = ring->bds[ring->bd_rd_idx].seq_no;
if (seq_no == 0xffff) {// it has been forced cleared by the openwifi_tx (due to out-of-order Tx of different queues to the air?)
printk("%s openwifi_tx_interrupt: WARNING wr%d rd%d last_bd_rd_idx%d i%d pkt_cnt%d prio%d fpga q%d hwq len%d bd prio%d len_mpdu%d seq_no%d skb_linked%p dma_mapping_addr%llu\n", sdr_compatible_str,
ring->bd_wr_idx, ring->bd_rd_idx, last_bd_rd_idx, i, pkt_cnt, prio, queue_idx, hw_queue_len, ring->bds[ring->bd_rd_idx].prio, ring->bds[ring->bd_rd_idx].len_mpdu, seq_no, ring->bds[ring->bd_rd_idx].skb_linked, ring->bds[ring->bd_rd_idx].dma_mapping_addr);
continue;
}
skb = ring->bds[ring->bd_rd_idx].skb_linked;
dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr,
skb->len, DMA_MEM_TO_DEV);
info = IEEE80211_SKB_CB(skb);
use_ht_aggr = ((info->flags&IEEE80211_TX_CTL_AMPDU)!=0);
ieee80211_tx_info_clear_status(info);
// Aggregation packet
if (use_ht_aggr)
{
start_idx = (seq_no>=blk_ack_ssn) ? (seq_no-blk_ack_ssn) : (seq_no+((~blk_ack_ssn+1)&0x0FFF));
tx_fail = (((blk_ack_bitmap>>start_idx)&0x1)==0);
info->flags |= IEEE80211_TX_STAT_AMPDU;
info->status.ampdu_len = 1;
info->status.ampdu_ack_len = (tx_fail == true) ? 0 : 1;
skb_pull(skb, LEN_MPDU_DELIM);
//skb_trim(skb, num_byte_pad_skb);
}
// Normal packet
else
{
tx_fail = ((blk_ack_bitmap&0x1)==0);
info->flags &= (~IEEE80211_TX_CTL_AMPDU);
}
pkt_need_ack = (!(info->flags & IEEE80211_TX_CTL_NO_ACK));
// do statistics for data packet that needs ack
hdr = (struct ieee80211_hdr *)skb->data;
addr1_low32 = *((u32*)(hdr->addr1+2));
if ( priv->stat.stat_enable && pkt_need_ack && (addr1_low32 == priv->stat.rx_target_sender_mac_addr || priv->stat.rx_target_sender_mac_addr==0) ) {
use_ht_rate = (((info->control.rates[0].flags)&IEEE80211_TX_RC_MCS)!=0);
mcs_for_sysfs = ieee80211_get_tx_rate(dev, info)->hw_value;
if (use_ht_rate)
mcs_for_sysfs = (mcs_for_sysfs | 0x80000000);
if ( ieee80211_is_data(hdr->frame_control) ) {
nof_retx_stat = (nof_retx<=5?nof_retx:5);
priv->stat.tx_data_pkt_need_ack_num_total++;
priv->stat.tx_data_pkt_mcs_realtime = mcs_for_sysfs;
priv->stat.tx_data_pkt_need_ack_num_retx[nof_retx_stat]++;
if (tx_fail) {
priv->stat.tx_data_pkt_need_ack_num_total_fail++;
priv->stat.tx_data_pkt_fail_mcs_realtime = mcs_for_sysfs;
priv->stat.tx_data_pkt_need_ack_num_retx_fail[nof_retx_stat]++;
}
} else if ( ieee80211_is_mgmt(hdr->frame_control) ) {
nof_retx_stat = (nof_retx<=2?nof_retx:2);
priv->stat.tx_mgmt_pkt_need_ack_num_total++;
priv->stat.tx_mgmt_pkt_mcs_realtime = mcs_for_sysfs;
priv->stat.tx_mgmt_pkt_need_ack_num_retx[nof_retx_stat]++;
if (tx_fail) {
priv->stat.tx_mgmt_pkt_need_ack_num_total_fail++;
priv->stat.tx_mgmt_pkt_fail_mcs_realtime = mcs_for_sysfs;
priv->stat.tx_mgmt_pkt_need_ack_num_retx_fail[nof_retx_stat]++;
}
}
}
if ( tx_fail == false )
info->flags |= IEEE80211_TX_STAT_ACK;
info->status.rates[0].count = nof_retx + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate
info->status.rates[1].idx = -1;
// info->status.rates[2].idx = -1;
// info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4
info->status.antenna = priv->runtime_tx_ant_cfg;
if ( ( (!pkt_need_ack)&&(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&DMESG_LOG_BROADCAST) ) || ( (pkt_need_ack)&&(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&DMESG_LOG_UNICAST) ) ){
printk("%s openwifi_tx_interrupt: tx_result [nof_retx %d pass %d] SC%d prio%d q%d wr%d rd%d num_slot%d cw%d hwq len%08x no_room_flag%x\n", sdr_compatible_str,
nof_retx+1, !tx_fail, seq_no, prio, queue_idx, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random, cw, hw_queue_len, dma_fifo_no_room_flag);
}
ieee80211_tx_status_irqsafe(dev, skb);
ring->bds[ring->bd_rd_idx].prio = 0xff; // invalid value
ring->bds[ring->bd_rd_idx].len_mpdu = 0; // invalid value
ring->bds[ring->bd_rd_idx].seq_no = 0xffff;
ring->bds[ring->bd_rd_idx].skb_linked = NULL;
ring->bds[ring->bd_rd_idx].dma_mapping_addr = 0;
}
loop_count++;
// printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx);
} else
break;
}
if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&DMESG_LOG_ERROR) )
printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count);
spin_unlock(&priv->lock);
return IRQ_HANDLED;
}
u32 crc_table[16] = {0x4DBDF21C, 0x500AE278, 0x76D3D2D4, 0x6B64C2B0, 0x3B61B38C, 0x26D6A3E8, 0x000F9344, 0x1DB88320, 0xA005713C, 0xBDB26158, 0x9B6B51F4, 0x86DC4190, 0xD6D930AC, 0xCB6E20C8, 0xEDB71064, 0xF0000000};
u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes)
{
u32 i, crc = 0;
u8 idx;
for( i = 0; i < num_bytes; i++)
{
idx = (crc & 0x0F) ^ (data_in[i] & 0x0F);
crc = (crc >> 4) ^ crc_table[idx];
idx = (crc & 0x0F) ^ ((data_in[i] >> 4) & 0x0F);
crc = (crc >> 4) ^ crc_table[idx];
}
return crc;
}
u8 gen_mpdu_delim_crc(u16 m)
{
u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, mpdu_delim_crc;
for (i = 0; i < 16; i++)
{
temp = c[7] ^ ((m >> i) & 0x01);
c[7] = c[6];
c[6] = c[5];
c[5] = c[4];
c[4] = c[3];
c[3] = c[2];
c[2] = c[1] ^ temp;
c[1] = c[0] ^ temp;
c[0] = temp;
}
mpdu_delim_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7);
return mpdu_delim_crc;
}
static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c
cdev_to_gpio_led_data(struct led_classdev *led_cdev)
{
return container_of(led_cdev, struct gpio_led_data, cdev);
}
inline int calc_n_ofdm(int num_octet, int n_dbps)
{
int num_bit, num_ofdm_sym;
num_bit = 22+num_octet*8;
num_ofdm_sym = (num_bit/n_dbps) + ((num_bit%n_dbps)!=0);
return (num_ofdm_sym);
}
inline __le16 gen_ht_duration_id(__le16 frame_control, __le16 aid, u8 qos_hdr, bool use_ht_aggr, u16 rate_hw_value, u16 sifs)
{
// COTS wifi ht QoS data duration field analysis (lots of capture):
// ht non-aggr QoS data: 44, type 2 (data frame) sub-type 8 (1000) 21.7/52/57.8/58.5/65Mbps
// ack ht 36 + 4*[(22+14*8)/78] = 36 + 4*2 = 44
// ack legacy 20 + 4*[(22+14*8)/72] = 20 + 4*2 = 28
// ht non-aggr QoS data: 60, type 2 (data frame) sub-type 8 (1000) 6.5Mbps
// ack ht 36 + 4*[(22+14*8)/26] = 36 + 4*6 = 60
// ack legacy 20 + 4*[(22+14*8)/24] = 20 + 4*6 = 44
// ht aggr QoS data: 52, type 2 (data frame) sub-type 8 (1000) 19.5/28.9/39/57.8/65/72.2Mbps
// ack ht 36 + 4*[(22+32*8)/78] = 36 + 4*4 = 52
// ack legacy 20 + 4*[(22+32*8)/72] = 20 + 4*4 = 36
// ht aggr QoS data: 60, type 2 (data frame) sub-type 8 (1000) 13/14.4Mbps
// ack ht 36 + 4*[(22+32*8)/52] = 36 + 4*6 = 60
// ack legacy 20 + 4*[(22+32*8)/48] = 20 + 4*6 = 44
// ht and legacy rate mapping is ont one on one, instead it is modulation combined with coding rate
// modulate coding ht-mcs ht-n_dbps legacy-mcs legacy-n_dbps
// BPSK 1/2 0 26 4 24
// QPSK 1/2 1 52 6 48
// QPSK 3/4 2 78 7 72
// 16QAM 1/2 3 104 8 96
// 16QAM 3/4 4 156 9 144
// 64QAM 2/3 5 208 10 192
// 64QAM 3/4 6 234 11 216
// conclusion: duration is: assume ack/blk-ack uses legacy, plus SIFS
// other observation: ht always use QoS data, not data (sub-type)
// other observation: management/control frame always in non-ht
__le16 dur = 0;
u16 n_dbps;
int num_octet, num_ofdm_sym;
if (ieee80211_is_pspoll(frame_control)) {
dur = (aid|0xc000);
} else if (ieee80211_is_data_qos(frame_control) && (~(qos_hdr&IEEE80211_QOS_CTL_ACK_POLICY_NOACK))) {
rate_hw_value = (rate_hw_value>6?6:rate_hw_value);
n_dbps = (rate_hw_value==0?wifi_n_dbps_table[4]:wifi_n_dbps_table[rate_hw_value+5]);
num_octet = (use_ht_aggr?32:14); //32 bytes for compressed block ack; 14 bytes for normal ack
num_ofdm_sym = calc_n_ofdm(num_octet, n_dbps);
dur = sifs + 20 + 4*num_ofdm_sym; // 20us legacy preamble
// printk("%s gen_ht_duration_id: num_octet %d n_dbps %d num_ofdm_sym %d dur %d\n", sdr_compatible_str,
// num_octet, n_dbps, num_ofdm_sym, dur);
} else {
printk("%s openwifi_tx: WARNING gen_ht_duration_id wrong pkt type!\n", sdr_compatible_str);
}
return dur;
}
inline void report_pkt_loss_due_to_driver_drop(struct ieee80211_hw *dev, struct sk_buff *skb)
{
struct openwifi_priv *priv = dev->priv;
struct ieee80211_tx_info *info;
info = IEEE80211_SKB_CB(skb);
ieee80211_tx_info_clear_status(info);
info->status.rates[0].count = 1;
info->status.rates[1].idx = -1;
info->status.antenna = priv->runtime_tx_ant_cfg;
ieee80211_tx_status_irqsafe(dev, skb);
}
static void openwifi_tx(struct ieee80211_hw *dev,
struct ieee80211_tx_control *control,
struct sk_buff *skb)
{
struct openwifi_priv *priv = dev->priv;
unsigned long flags;
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
struct openwifi_ring *ring = NULL;
struct sk_buff *skb_new; // temp skb for internal use
struct ieee80211_tx_info *info_skipped;
dma_addr_t dma_mapping_addr;
unsigned int i, j, empty_bd_idx = 0;
u16 rate_signal_value, rate_hw_value, len_mpdu, len_psdu, num_dma_symbol, len_mpdu_delim_pad=0, num_byte_pad;
u32 num_dma_byte, addr1_low32, addr2_low32=0, addr3_low32=0, tx_config, cts_reg, phy_hdr_config;//, openofdm_state_history;
u16 addr1_high16, addr2_high16=0, addr3_high16=0, sc, seq_no=0, cts_duration=0, cts_rate_hw_value=0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration, n_dbps;
u8 pkt_need_ack, retry_limit_raw,use_short_gi,*dma_buf,retry_limit_hw_value,rc_flags,qos_hdr,prio,queue_idx,drv_ring_idx;
bool drv_seqno=false, use_rts_cts, use_cts_protect, ht_aggr_start=false, use_ht_rate, use_ht_aggr, cts_use_traffic_rate=false, force_use_cts_protect=false;
__le16 frame_control,duration_id;
u32 dma_fifo_no_room_flag, hw_queue_len, delay_count=0;
enum dma_status status;
static u32 addr1_low32_prev = -1;
static u16 rate_hw_value_prev = -1;
static u8 pkt_need_ack_prev = -1;
static u16 addr1_high16_prev = -1;
static __le16 duration_id_prev = -1;
static u8 prio_prev = -1;
static u8 retry_limit_raw_prev = -1;
static u8 use_short_gi_prev = -1;
// static bool led_status=0;
// struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]);
// if ( (priv->phy_tx_sn&7) ==0 ) {
// openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read();
// if (openofdm_state_history!=openofdm_state_history_old){
// led_status = (~led_status);
// openofdm_state_history_old = openofdm_state_history;
// gpiod_set_value(led_dat->gpiod, led_status);
// }
// }
if (skb->data_len>0) {// more data are not in linear data area skb->data
printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str);
goto openwifi_tx_early_out;
}
len_mpdu = skb->len;
// get Linux priority/queue setting info and target mac address
prio = skb_get_queue_mapping(skb);
if (prio >= MAX_NUM_HW_QUEUE) {
printk("%s openwifi_tx: WARNING prio%d\n", sdr_compatible_str, prio);
goto openwifi_tx_early_out;
}
addr1_low32 = *((u32*)(hdr->addr1+2));
// ---- DO your idea here! Map Linux/SW "prio" to driver "drv_ring_idx" (then 1on1 to FPGA queue_idx) ---
if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config
drv_ring_idx = prio;
} else {// customized prio to drv_ring_idx mapping
// check current packet belonging to which slice/hw-queue
for (i=0; i<MAX_NUM_HW_QUEUE; i++) {
if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) {
break;
}
}
drv_ring_idx = (i>=MAX_NUM_HW_QUEUE?prio:i); // if no address is hit
}
ring = &(priv->tx_ring[drv_ring_idx]);
spin_lock_irqsave(&priv->lock, flags);
if (ring->bds[ring->bd_wr_idx].seq_no != 0xffff) { // not cleared yet by interrupt
for (i=1; i<NUM_TX_BD; i++) {