vmreg_x86.hpp

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#ifndef CPU_X86_VMREG_X86_HPP
#define CPU_X86_VMREG_X86_HPP



inline bool is_Register() {
  return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
}

inline bool is_FloatRegister() {
  return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
}

inline bool is_XMMRegister() {
  int uarch_max_xmm = ConcreteRegisterImpl::max_xmm;

#ifdef _LP64
  if (UseAVX < 3) {
    int half_xmm = (XMMRegisterImpl::max_slots_per_register * XMMRegisterImpl::number_of_registers) / 2;
    uarch_max_xmm -= half_xmm;
  }
#endif

  return (value() >= ConcreteRegisterImpl::max_fpr && value() < uarch_max_xmm);
}

inline bool is_KRegister() {
  if (UseAVX > 2) {
    return value() >= ConcreteRegisterImpl::max_xmm && value() < ConcreteRegisterImpl::max_kpr;
  } else {
    return false;
  }
}

inline Register as_Register() {

  assert( is_Register(), "must be");
  // Yuk
#ifdef AMD64
  return ::as_Register(value() >> 1);
#else
  return ::as_Register(value());
#endif // AMD64
}

inline FloatRegister as_FloatRegister() {
  assert( is_FloatRegister() && is_even(value()), "must be" );
  // Yuk
  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
}

inline XMMRegister as_XMMRegister() {
  assert( is_XMMRegister() && is_even(value()), "must be" );
  // Yuk
  return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 4);
}

inline KRegister as_KRegister() {
  assert(is_KRegister(), "must be");
  // Yuk
  return ::as_KRegister((value() - ConcreteRegisterImpl::max_xmm) >> 1);
}

inline   bool is_concrete() {
  assert(is_reg(), "must be");
#ifndef AMD64
  if (is_Register()) return true;
#endif // AMD64
  // Do not use is_XMMRegister() here as it depends on the UseAVX setting.
  if (value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm) {
    int base = value() - ConcreteRegisterImpl::max_fpr;
    return base % XMMRegisterImpl::max_slots_per_register == 0;
  } else {
    return is_even(value());   // General, float, and K registers are all two slots wide
  }
}

#endif // CPU_X86_VMREG_X86_HPP