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vm_mips64.dasc
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|// Low-level VM code for MIPS64 CPUs.
|// Bytecode interpreter, fast functions and helper functions.
|// Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
|//
|// Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
|// Sponsored by Cisco Systems, Inc.
|
|.arch mips64
|.section code_op, code_sub
|
|.actionlist build_actionlist
|.globals GLOB_
|.globalnames globnames
|.externnames extnames
|
|// Note: The ragged indentation of the instructions is intentional.
|// The starting columns indicate data dependencies.
|
|//-----------------------------------------------------------------------
|
|// Fixed register assignments for the interpreter.
|// Don't use: r0 = 0, r26/r27 = reserved, r28 = gp, r29 = sp, r31 = ra
|
|.macro .FPU, a, b
|.if FPU
| a, b
|.endif
|.endmacro
|
|// The following must be C callee-save (but BASE is often refetched).
|.define BASE, r16 // Base of current Lua stack frame.
|.define KBASE, r17 // Constants of current Lua function.
|.define PC, r18 // Next PC.
|.define DISPATCH, r19 // Opcode dispatch table.
|.define LREG, r20 // Register holding lua_State (also in SAVE_L).
|.define MULTRES, r21 // Size of multi-result: (nresults+1)*8.
|
|.define JGL, r30 // On-trace: global_State + 32768.
|
|// Constants for type-comparisons, stores and conversions. C callee-save.
|.define TISNIL, r30
|.define TISNUM, r22
|.if FPU
|.define TOBIT, f30 // 2^52 + 2^51.
|.endif
|
|// The following temporaries are not saved across C calls, except for RA.
|.define RA, r23 // Callee-save.
|.define RB, r8
|.define RC, r9
|.define RD, r10
|.define INS, r11
|
|.define AT, r1 // Assembler temporary.
|.define TMP0, r12
|.define TMP1, r13
|.define TMP2, r14
|.define TMP3, r15
|
|// MIPS n64 calling convention.
|.define CFUNCADDR, r25
|.define CARG1, r4
|.define CARG2, r5
|.define CARG3, r6
|.define CARG4, r7
|.define CARG5, r8
|.define CARG6, r9
|.define CARG7, r10
|.define CARG8, r11
|
|.define CRET1, r2
|.define CRET2, r3
|
|.if FPU
|.define FARG1, f12
|.define FARG2, f13
|.define FARG3, f14
|.define FARG4, f15
|.define FARG5, f16
|.define FARG6, f17
|.define FARG7, f18
|.define FARG8, f19
|
|.define FRET1, f0
|.define FRET2, f2
|
|.define FTMP0, f20
|.define FTMP1, f21
|.define FTMP2, f22
|.endif
|
|// Stack layout while in interpreter. Must match with lj_frame.h.
|.if FPU // MIPS64 hard-float.
|
|.define CFRAME_SPACE, 192 // Delta for sp.
|
|//----- 16 byte aligned, <-- sp entering interpreter
|.define SAVE_ERRF, 188(sp) // 32 bit values.
|.define SAVE_NRES, 184(sp)
|.define SAVE_CFRAME, 176(sp) // 64 bit values.
|.define SAVE_L, 168(sp)
|.define SAVE_PC, 160(sp)
|//----- 16 byte aligned
|.define SAVE_GPR_, 80 // .. 80+10*8: 64 bit GPR saves.
|.define SAVE_FPR_, 16 // .. 16+8*8: 64 bit FPR saves.
|
|.else // MIPS64 soft-float
|
|.define CFRAME_SPACE, 128 // Delta for sp.
|
|//----- 16 byte aligned, <-- sp entering interpreter
|.define SAVE_ERRF, 124(sp) // 32 bit values.
|.define SAVE_NRES, 120(sp)
|.define SAVE_CFRAME, 112(sp) // 64 bit values.
|.define SAVE_L, 104(sp)
|.define SAVE_PC, 96(sp)
|//----- 16 byte aligned
|.define SAVE_GPR_, 16 // .. 16+10*8: 64 bit GPR saves.
|
|.endif
|
|.define TMPX, 8(sp) // Unused by interpreter, temp for JIT code.
|.define TMPD, 0(sp)
|//----- 16 byte aligned
|
|.define TMPD_OFS, 0
|
|.define SAVE_MULTRES, TMPD
|
|//-----------------------------------------------------------------------
|
|.macro saveregs
| daddiu sp, sp, -CFRAME_SPACE
| sd ra, SAVE_GPR_+9*8(sp)
| sd r30, SAVE_GPR_+8*8(sp)
| .FPU sdc1 f31, SAVE_FPR_+7*8(sp)
| sd r23, SAVE_GPR_+7*8(sp)
| .FPU sdc1 f30, SAVE_FPR_+6*8(sp)
| sd r22, SAVE_GPR_+6*8(sp)
| .FPU sdc1 f29, SAVE_FPR_+5*8(sp)
| sd r21, SAVE_GPR_+5*8(sp)
| .FPU sdc1 f28, SAVE_FPR_+4*8(sp)
| sd r20, SAVE_GPR_+4*8(sp)
| .FPU sdc1 f27, SAVE_FPR_+3*8(sp)
| sd r19, SAVE_GPR_+3*8(sp)
| .FPU sdc1 f26, SAVE_FPR_+2*8(sp)
| sd r18, SAVE_GPR_+2*8(sp)
| .FPU sdc1 f25, SAVE_FPR_+1*8(sp)
| sd r17, SAVE_GPR_+1*8(sp)
| .FPU sdc1 f24, SAVE_FPR_+0*8(sp)
| sd r16, SAVE_GPR_+0*8(sp)
|.endmacro
|
|.macro restoreregs_ret
| ld ra, SAVE_GPR_+9*8(sp)
| ld r30, SAVE_GPR_+8*8(sp)
| ld r23, SAVE_GPR_+7*8(sp)
| .FPU ldc1 f31, SAVE_FPR_+7*8(sp)
| ld r22, SAVE_GPR_+6*8(sp)
| .FPU ldc1 f30, SAVE_FPR_+6*8(sp)
| ld r21, SAVE_GPR_+5*8(sp)
| .FPU ldc1 f29, SAVE_FPR_+5*8(sp)
| ld r20, SAVE_GPR_+4*8(sp)
| .FPU ldc1 f28, SAVE_FPR_+4*8(sp)
| ld r19, SAVE_GPR_+3*8(sp)
| .FPU ldc1 f27, SAVE_FPR_+3*8(sp)
| ld r18, SAVE_GPR_+2*8(sp)
| .FPU ldc1 f26, SAVE_FPR_+2*8(sp)
| ld r17, SAVE_GPR_+1*8(sp)
| .FPU ldc1 f25, SAVE_FPR_+1*8(sp)
| ld r16, SAVE_GPR_+0*8(sp)
| .FPU ldc1 f24, SAVE_FPR_+0*8(sp)
| jr ra
| daddiu sp, sp, CFRAME_SPACE
|.endmacro
|
|// Type definitions. Some of these are only used for documentation.
|.type L, lua_State, LREG
|.type GL, global_State
|.type TVALUE, TValue
|.type GCOBJ, GCobj
|.type STR, GCstr
|.type TAB, GCtab
|.type LFUNC, GCfuncL
|.type CFUNC, GCfuncC
|.type PROTO, GCproto
|.type UPVAL, GCupval
|.type NODE, Node
|.type NARGS8, int
|.type TRACE, GCtrace
|.type SBUF, SBuf
|
|//-----------------------------------------------------------------------
|
|// Trap for not-yet-implemented parts.
|.macro NYI; .long 0xec1cf0f0; .endmacro
|
|// Macros to mark delay slots.
|.macro ., a; a; .endmacro
|.macro ., a,b; a,b; .endmacro
|.macro ., a,b,c; a,b,c; .endmacro
|.macro ., a,b,c,d; a,b,c,d; .endmacro
|
|.define FRAME_PC, -8
|.define FRAME_FUNC, -16
|
|//-----------------------------------------------------------------------
|
|// Endian-specific defines.
|.if ENDIAN_LE
|.define HI, 4
|.define LO, 0
|.define OFS_RD, 2
|.define OFS_RA, 1
|.define OFS_OP, 0
|.else
|.define HI, 0
|.define LO, 4
|.define OFS_RD, 0
|.define OFS_RA, 2
|.define OFS_OP, 3
|.endif
|
|// Instruction decode.
|.macro decode_OP1, dst, ins; andi dst, ins, 0xff; .endmacro
|.macro decode_OP8a, dst, ins; andi dst, ins, 0xff; .endmacro
|.macro decode_OP8b, dst; sll dst, dst, 3; .endmacro
|.macro decode_RC8a, dst, ins; srl dst, ins, 13; .endmacro
|.macro decode_RC8b, dst; andi dst, dst, 0x7f8; .endmacro
|.macro decode_RD4b, dst; sll dst, dst, 2; .endmacro
|.macro decode_RA8a, dst, ins; srl dst, ins, 5; .endmacro
|.macro decode_RA8b, dst; andi dst, dst, 0x7f8; .endmacro
|.macro decode_RB8a, dst, ins; srl dst, ins, 21; .endmacro
|.macro decode_RB8b, dst; andi dst, dst, 0x7f8; .endmacro
|.macro decode_RD8a, dst, ins; srl dst, ins, 16; .endmacro
|.macro decode_RD8b, dst; sll dst, dst, 3; .endmacro
|.macro decode_RDtoRC8, dst, src; andi dst, src, 0x7f8; .endmacro
|
|// Instruction fetch.
|.macro ins_NEXT1
| lw INS, 0(PC)
| daddiu PC, PC, 4
|.endmacro
|// Instruction decode+dispatch.
|.macro ins_NEXT2
| decode_OP8a TMP1, INS
| decode_OP8b TMP1
| daddu TMP0, DISPATCH, TMP1
| decode_RD8a RD, INS
| ld AT, 0(TMP0)
| decode_RA8a RA, INS
| decode_RD8b RD
| jr AT
| decode_RA8b RA
|.endmacro
|.macro ins_NEXT
| ins_NEXT1
| ins_NEXT2
|.endmacro
|
|// Instruction footer.
|.if 1
| // Replicated dispatch. Less unpredictable branches, but higher I-Cache use.
| .define ins_next, ins_NEXT
| .define ins_next_, ins_NEXT
| .define ins_next1, ins_NEXT1
| .define ins_next2, ins_NEXT2
|.else
| // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch.
| // Affects only certain kinds of benchmarks (and only with -j off).
| .macro ins_next
| b ->ins_next
| .endmacro
| .macro ins_next1
| .endmacro
| .macro ins_next2
| b ->ins_next
| .endmacro
| .macro ins_next_
| ->ins_next:
| ins_NEXT
| .endmacro
|.endif
|
|// Call decode and dispatch.
|.macro ins_callt
| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
| ld PC, LFUNC:RB->pc
| lw INS, 0(PC)
| daddiu PC, PC, 4
| decode_OP8a TMP1, INS
| decode_RA8a RA, INS
| decode_OP8b TMP1
| decode_RA8b RA
| daddu TMP0, DISPATCH, TMP1
| ld TMP0, 0(TMP0)
| jr TMP0
| daddu RA, RA, BASE
|.endmacro
|
|.macro ins_call
| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, PC = caller PC
| sd PC, FRAME_PC(BASE)
| ins_callt
|.endmacro
|
|//-----------------------------------------------------------------------
|
|.macro branch_RD
| srl TMP0, RD, 1
| lui AT, (-(BCBIAS_J*4 >> 16) & 65535)
| addu TMP0, TMP0, AT
| daddu PC, PC, TMP0
|.endmacro
|
|// Assumes DISPATCH is relative to GL.
#define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field))
#define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field))
#define GG_DISP2GOT (GG_OFS(got) - GG_OFS(dispatch))
#define DISPATCH_GOT(name) (GG_DISP2GOT + sizeof(void*)*LJ_GOT_##name)
|
#define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))
|
|.macro load_got, func
| ld CFUNCADDR, DISPATCH_GOT(func)(DISPATCH)
|.endmacro
|// Much faster. Sadly, there's no easy way to force the required code layout.
|// .macro call_intern, func; bal extern func; .endmacro
|.macro call_intern, func; jalr CFUNCADDR; .endmacro
|.macro call_extern; jalr CFUNCADDR; .endmacro
|.macro jmp_extern; jr CFUNCADDR; .endmacro
|
|.macro hotcheck, delta, target
| dsrl TMP1, PC, 1
| andi TMP1, TMP1, 126
| daddu TMP1, TMP1, DISPATCH
| lhu TMP2, GG_DISP2HOT(TMP1)
| addiu TMP2, TMP2, -delta
| bltz TMP2, target
|. sh TMP2, GG_DISP2HOT(TMP1)
|.endmacro
|
|.macro hotloop
| hotcheck HOTCOUNT_LOOP, ->vm_hotloop
|.endmacro
|
|.macro hotcall
| hotcheck HOTCOUNT_CALL, ->vm_hotcall
|.endmacro
|
|// Set current VM state. Uses TMP0.
|.macro li_vmstate, st; li TMP0, ~LJ_VMST_..st; .endmacro
|.macro st_vmstate; sw TMP0, DISPATCH_GL(vmstate)(DISPATCH); .endmacro
|
|// Move table write barrier back. Overwrites mark and tmp.
|.macro barrierback, tab, mark, tmp, target
| ld tmp, DISPATCH_GL(gc.grayagain)(DISPATCH)
| andi mark, mark, ~LJ_GC_BLACK & 255 // black2gray(tab)
| sd tab, DISPATCH_GL(gc.grayagain)(DISPATCH)
| sb mark, tab->marked
| b target
|. sd tmp, tab->gclist
|.endmacro
|
|// Clear type tag. Isolate lowest 14+32+1=47 bits of reg.
|.macro cleartp, reg; dextm reg, reg, 0, 14; .endmacro
|.macro cleartp, dst, reg; dextm dst, reg, 0, 14; .endmacro
|
|// Set type tag: Merge 17 type bits into bits [15+32=47, 31+32+1=64) of dst.
|.macro settp, dst, tp; dinsu dst, tp, 15, 31; .endmacro
|
|// Extract (negative) type tag.
|.macro gettp, dst, src; dsra dst, src, 47; .endmacro
|
|// Macros to check the TValue type and extract the GCobj. Branch on failure.
|.macro checktp, reg, tp, target
| gettp AT, reg
| daddiu AT, AT, tp
| bnez AT, target
|. cleartp reg
|.endmacro
|.macro checktp, dst, reg, tp, target
| gettp AT, reg
| daddiu AT, AT, tp
| bnez AT, target
|. cleartp dst, reg
|.endmacro
|.macro checkstr, reg, target; checktp reg, -LJ_TSTR, target; .endmacro
|.macro checktab, reg, target; checktp reg, -LJ_TTAB, target; .endmacro
|.macro checkfunc, reg, target; checktp reg, -LJ_TFUNC, target; .endmacro
|.macro checkint, reg, target // Caveat: has delay slot!
| gettp AT, reg
| bne AT, TISNUM, target
|.endmacro
|.macro checknum, reg, target // Caveat: has delay slot!
| gettp AT, reg
| sltiu AT, AT, LJ_TISNUM
| beqz AT, target
|.endmacro
|
|.macro mov_false, reg
| lu reg, 0x8000
| dsll reg, reg, 32
| not reg, reg
|.endmacro
|.macro mov_true, reg
| li reg, 0x0001
| dsll reg, reg, 48
| not reg, reg
|.endmacro
|
|//-----------------------------------------------------------------------
/* Generate subroutines used by opcodes and other parts of the VM. */
/* The .code_sub section should be last to help static branch prediction. */
static void build_subroutines(BuildCtx *ctx)
{
|.code_sub
|
|//-----------------------------------------------------------------------
|//-- Return handling ----------------------------------------------------
|//-----------------------------------------------------------------------
|
|->vm_returnp:
| // See vm_return. Also: TMP2 = previous base.
| andi AT, PC, FRAME_P
| beqz AT, ->cont_dispatch
|
| // Return from pcall or xpcall fast func.
|. mov_true TMP1
| ld PC, FRAME_PC(TMP2) // Fetch PC of previous frame.
| move BASE, TMP2 // Restore caller base.
| // Prepending may overwrite the pcall frame, so do it at the end.
| sd TMP1, -8(RA) // Prepend true to results.
| daddiu RA, RA, -8
|
|->vm_returnc:
| addiu RD, RD, 8 // RD = (nresults+1)*8.
| andi TMP0, PC, FRAME_TYPE
| beqz RD, ->vm_unwind_c_eh
|. li CRET1, LUA_YIELD
| beqz TMP0, ->BC_RET_Z // Handle regular return to Lua.
|. move MULTRES, RD
|
|->vm_return:
| // BASE = base, RA = resultptr, RD/MULTRES = (nresults+1)*8, PC = return
| // TMP0 = PC & FRAME_TYPE
| li TMP2, -8
| xori AT, TMP0, FRAME_C
| and TMP2, PC, TMP2
| bnez AT, ->vm_returnp
| dsubu TMP2, BASE, TMP2 // TMP2 = previous base.
|
| addiu TMP1, RD, -8
| sd TMP2, L->base
| li_vmstate C
| lw TMP2, SAVE_NRES
| daddiu BASE, BASE, -16
| st_vmstate
| beqz TMP1, >2
|. sll TMP2, TMP2, 3
|1:
| addiu TMP1, TMP1, -8
| ld CRET1, 0(RA)
| daddiu RA, RA, 8
| sd CRET1, 0(BASE)
| bnez TMP1, <1
|. daddiu BASE, BASE, 8
|
|2:
| bne TMP2, RD, >6
|3:
|. sd BASE, L->top // Store new top.
|
|->vm_leave_cp:
| ld TMP0, SAVE_CFRAME // Restore previous C frame.
| move CRET1, r0 // Ok return status for vm_pcall.
| sd TMP0, L->cframe
|
|->vm_leave_unw:
| restoreregs_ret
|
|6:
| ld TMP1, L->maxstack
| slt AT, TMP2, RD
| bnez AT, >7 // Less results wanted?
| // More results wanted. Check stack size and fill up results with nil.
|. slt AT, BASE, TMP1
| beqz AT, >8
|. nop
| sd TISNIL, 0(BASE)
| addiu RD, RD, 8
| b <2
|. daddiu BASE, BASE, 8
|
|7: // Less results wanted.
| subu TMP0, RD, TMP2
| dsubu TMP0, BASE, TMP0 // Either keep top or shrink it.
|.if MIPSR6
| selnez TMP0, TMP0, TMP2 // LUA_MULTRET+1 case?
| seleqz BASE, BASE, TMP2
| b <3
|. or BASE, BASE, TMP0
|.else
| b <3
|. movn BASE, TMP0, TMP2 // LUA_MULTRET+1 case?
|.endif
|
|8: // Corner case: need to grow stack for filling up results.
| // This can happen if:
| // - A C function grows the stack (a lot).
| // - The GC shrinks the stack in between.
| // - A return back from a lua_call() with (high) nresults adjustment.
| load_got lj_state_growstack
| move MULTRES, RD
| srl CARG2, TMP2, 3
| call_intern lj_state_growstack // (lua_State *L, int n)
|. move CARG1, L
| lw TMP2, SAVE_NRES
| ld BASE, L->top // Need the (realloced) L->top in BASE.
| move RD, MULTRES
| b <2
|. sll TMP2, TMP2, 3
|
|->vm_unwind_c: // Unwind C stack, return from vm_pcall.
| // (void *cframe, int errcode)
| move sp, CARG1
| move CRET1, CARG2
|->vm_unwind_c_eh: // Landing pad for external unwinder.
| ld L, SAVE_L
| li TMP0, ~LJ_VMST_C
| ld GL:TMP1, L->glref
| b ->vm_leave_unw
|. sw TMP0, GL:TMP1->vmstate
|
|->vm_unwind_ff: // Unwind C stack, return from ff pcall.
| // (void *cframe)
| li AT, -4
| and sp, CARG1, AT
|->vm_unwind_ff_eh: // Landing pad for external unwinder.
| ld L, SAVE_L
| .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
| li TISNIL, LJ_TNIL
| li TISNUM, LJ_TISNUM
| ld BASE, L->base
| ld DISPATCH, L->glref // Setup pointer to dispatch table.
| .FPU mtc1 TMP3, TOBIT
| mov_false TMP1
| li_vmstate INTERP
| ld PC, FRAME_PC(BASE) // Fetch PC of previous frame.
| .FPU cvt.d.s TOBIT, TOBIT
| daddiu RA, BASE, -8 // Results start at BASE-8.
| daddiu DISPATCH, DISPATCH, GG_G2DISP
| sd TMP1, 0(RA) // Prepend false to error message.
| st_vmstate
| b ->vm_returnc
|. li RD, 16 // 2 results: false + error message.
|
|->vm_unwind_stub: // Jump to exit stub from unwinder.
| jr CARG1
|. move ra, CARG2
|
|//-----------------------------------------------------------------------
|//-- Grow stack for calls -----------------------------------------------
|//-----------------------------------------------------------------------
|
|->vm_growstack_c: // Grow stack for C function.
| b >2
|. li CARG2, LUA_MINSTACK
|
|->vm_growstack_l: // Grow stack for Lua function.
| // BASE = new base, RA = BASE+framesize*8, RC = nargs*8, PC = first PC
| daddu RC, BASE, RC
| dsubu RA, RA, BASE
| sd BASE, L->base
| daddiu PC, PC, 4 // Must point after first instruction.
| sd RC, L->top
| srl CARG2, RA, 3
|2:
| // L->base = new base, L->top = top
| load_got lj_state_growstack
| sd PC, SAVE_PC
| call_intern lj_state_growstack // (lua_State *L, int n)
|. move CARG1, L
| ld BASE, L->base
| ld RC, L->top
| ld LFUNC:RB, FRAME_FUNC(BASE)
| dsubu RC, RC, BASE
| cleartp LFUNC:RB
| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
| ins_callt // Just retry the call.
|
|//-----------------------------------------------------------------------
|//-- Entry points into the assembler VM ---------------------------------
|//-----------------------------------------------------------------------
|
|->vm_resume: // Setup C frame and resume thread.
| // (lua_State *L, TValue *base, int nres1 = 0, ptrdiff_t ef = 0)
| saveregs
| move L, CARG1
| ld DISPATCH, L->glref // Setup pointer to dispatch table.
| move BASE, CARG2
| lbu TMP1, L->status
| sd L, SAVE_L
| li PC, FRAME_CP
| daddiu TMP0, sp, CFRAME_RESUME
| daddiu DISPATCH, DISPATCH, GG_G2DISP
| sw r0, SAVE_NRES
| sw r0, SAVE_ERRF
| sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
| sd r0, SAVE_CFRAME
| beqz TMP1, >3
|. sd TMP0, L->cframe
|
| // Resume after yield (like a return).
| sd L, DISPATCH_GL(cur_L)(DISPATCH)
| move RA, BASE
| ld BASE, L->base
| ld TMP1, L->top
| ld PC, FRAME_PC(BASE)
| .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
| dsubu RD, TMP1, BASE
| .FPU mtc1 TMP3, TOBIT
| sb r0, L->status
| .FPU cvt.d.s TOBIT, TOBIT
| li_vmstate INTERP
| daddiu RD, RD, 8
| st_vmstate
| move MULTRES, RD
| andi TMP0, PC, FRAME_TYPE
| li TISNIL, LJ_TNIL
| beqz TMP0, ->BC_RET_Z
|. li TISNUM, LJ_TISNUM
| b ->vm_return
|. nop
|
|->vm_pcall: // Setup protected C frame and enter VM.
| // (lua_State *L, TValue *base, int nres1, ptrdiff_t ef)
| saveregs
| sw CARG4, SAVE_ERRF
| b >1
|. li PC, FRAME_CP
|
|->vm_call: // Setup C frame and enter VM.
| // (lua_State *L, TValue *base, int nres1)
| saveregs
| li PC, FRAME_C
|
|1: // Entry point for vm_pcall above (PC = ftype).
| ld TMP1, L:CARG1->cframe
| move L, CARG1
| sw CARG3, SAVE_NRES
| ld DISPATCH, L->glref // Setup pointer to dispatch table.
| sd CARG1, SAVE_L
| move BASE, CARG2
| daddiu DISPATCH, DISPATCH, GG_G2DISP
| sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
| sd TMP1, SAVE_CFRAME
| sd sp, L->cframe // Add our C frame to cframe chain.
|
|3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype).
| sd L, DISPATCH_GL(cur_L)(DISPATCH)
| ld TMP2, L->base // TMP2 = old base (used in vmeta_call).
| .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
| ld TMP1, L->top
| .FPU mtc1 TMP3, TOBIT
| daddu PC, PC, BASE
| dsubu NARGS8:RC, TMP1, BASE
| li TISNUM, LJ_TISNUM
| dsubu PC, PC, TMP2 // PC = frame delta + frame type
| .FPU cvt.d.s TOBIT, TOBIT
| li_vmstate INTERP
| li TISNIL, LJ_TNIL
| st_vmstate
|
|->vm_call_dispatch:
| // TMP2 = old base, BASE = new base, RC = nargs*8, PC = caller PC
| ld LFUNC:RB, FRAME_FUNC(BASE)
| checkfunc LFUNC:RB, ->vmeta_call
|
|->vm_call_dispatch_f:
| ins_call
| // BASE = new base, RB = func, RC = nargs*8, PC = caller PC
|
|->vm_cpcall: // Setup protected C frame, call C.
| // (lua_State *L, lua_CFunction func, void *ud, lua_CPFunction cp)
| saveregs
| move L, CARG1
| ld TMP0, L:CARG1->stack
| sd CARG1, SAVE_L
| ld TMP1, L->top
| ld DISPATCH, L->glref // Setup pointer to dispatch table.
| sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
| dsubu TMP0, TMP0, TMP1 // Compute -savestack(L, L->top).
| ld TMP1, L->cframe
| daddiu DISPATCH, DISPATCH, GG_G2DISP
| sw TMP0, SAVE_NRES // Neg. delta means cframe w/o frame.
| sw r0, SAVE_ERRF // No error function.
| sd TMP1, SAVE_CFRAME
| sd sp, L->cframe // Add our C frame to cframe chain.
| sd L, DISPATCH_GL(cur_L)(DISPATCH)
| jalr CARG4 // (lua_State *L, lua_CFunction func, void *ud)
|. move CFUNCADDR, CARG4
| move BASE, CRET1
| bnez CRET1, <3 // Else continue with the call.
|. li PC, FRAME_CP
| b ->vm_leave_cp // No base? Just remove C frame.
|. nop
|
|//-----------------------------------------------------------------------
|//-- Metamethod handling ------------------------------------------------
|//-----------------------------------------------------------------------
|
|// The lj_meta_* functions (except for lj_meta_cat) don't reallocate the
|// stack, so BASE doesn't need to be reloaded across these calls.
|
|//-- Continuation dispatch ----------------------------------------------
|
|->cont_dispatch:
| // BASE = meta base, RA = resultptr, RD = (nresults+1)*8
| ld TMP0, -32(BASE) // Continuation.
| move RB, BASE
| move BASE, TMP2 // Restore caller BASE.
| ld LFUNC:TMP1, FRAME_FUNC(TMP2)
|.if FFI
| sltiu AT, TMP0, 2
|.endif
| ld PC, -24(RB) // Restore PC from [cont|PC].
| cleartp LFUNC:TMP1
| daddu TMP2, RA, RD
|.if FFI
| bnez AT, >1
|.endif
|. sd TISNIL, -8(TMP2) // Ensure one valid arg.
| ld TMP1, LFUNC:TMP1->pc
| // BASE = base, RA = resultptr, RB = meta base
| jr TMP0 // Jump to continuation.
|. ld KBASE, PC2PROTO(k)(TMP1)
|
|.if FFI
|1:
| bnez TMP0, ->cont_ffi_callback // cont = 1: return from FFI callback.
| // cont = 0: tailcall from C function.
|. daddiu TMP1, RB, -32
| b ->vm_call_tail
|. dsubu RC, TMP1, BASE
|.endif
|
|->cont_cat: // RA = resultptr, RB = meta base
| lw INS, -4(PC)
| daddiu CARG2, RB, -32
| ld CRET1, 0(RA)
| decode_RB8a MULTRES, INS
| decode_RA8a RA, INS
| decode_RB8b MULTRES
| decode_RA8b RA
| daddu TMP1, BASE, MULTRES
| sd BASE, L->base
| dsubu CARG3, CARG2, TMP1
| bne TMP1, CARG2, ->BC_CAT_Z
|. sd CRET1, 0(CARG2)
| daddu RA, BASE, RA
| b ->cont_nop
|. sd CRET1, 0(RA)
|
|//-- Table indexing metamethods -----------------------------------------
|
|->vmeta_tgets1:
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
| li TMP0, LJ_TSTR
| settp STR:RC, TMP0
| b >1
|. sd STR:RC, 0(CARG3)
|
|->vmeta_tgets:
| daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
| li TMP0, LJ_TTAB
| li TMP1, LJ_TSTR
| settp TAB:RB, TMP0
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
| sd TAB:RB, 0(CARG2)
| settp STR:RC, TMP1
| b >1
|. sd STR:RC, 0(CARG3)
|
|->vmeta_tgetb: // TMP0 = index
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
| settp TMP0, TISNUM
| sd TMP0, 0(CARG3)
|
|->vmeta_tgetv:
|1:
| load_got lj_meta_tget
| sd BASE, L->base
| sd PC, SAVE_PC
| call_intern lj_meta_tget // (lua_State *L, TValue *o, TValue *k)
|. move CARG1, L
| // Returns TValue * (finished) or NULL (metamethod).
| beqz CRET1, >3
|. daddiu TMP1, BASE, -FRAME_CONT
| ld CARG1, 0(CRET1)
| ins_next1
| sd CARG1, 0(RA)
| ins_next2
|
|3: // Call __index metamethod.
| // BASE = base, L->top = new base, stack = cont/func/t/k
| ld BASE, L->top
| sd PC, -24(BASE) // [cont|PC]
| dsubu PC, BASE, TMP1
| ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
| cleartp LFUNC:RB
| b ->vm_call_dispatch_f
|. li NARGS8:RC, 16 // 2 args for func(t, k).
|
|->vmeta_tgetr:
| load_got lj_tab_getinth
| call_intern lj_tab_getinth // (GCtab *t, int32_t key)
|. nop
| // Returns cTValue * or NULL.
| beqz CRET1, ->BC_TGETR_Z
|. move CARG2, TISNIL
| b ->BC_TGETR_Z
|. ld CARG2, 0(CRET1)
|
|//-----------------------------------------------------------------------
|
|->vmeta_tsets1:
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
| li TMP0, LJ_TSTR
| settp STR:RC, TMP0
| b >1
|. sd STR:RC, 0(CARG3)
|
|->vmeta_tsets:
| daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
| li TMP0, LJ_TTAB
| li TMP1, LJ_TSTR
| settp TAB:RB, TMP0
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
| sd TAB:RB, 0(CARG2)
| settp STR:RC, TMP1
| b >1
|. sd STR:RC, 0(CARG3)
|
|->vmeta_tsetb: // TMP0 = index
| daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
| settp TMP0, TISNUM
| sd TMP0, 0(CARG3)
|
|->vmeta_tsetv:
|1:
| load_got lj_meta_tset
| sd BASE, L->base
| sd PC, SAVE_PC
| call_intern lj_meta_tset // (lua_State *L, TValue *o, TValue *k)
|. move CARG1, L
| // Returns TValue * (finished) or NULL (metamethod).
| beqz CRET1, >3
|. ld CARG1, 0(RA)
| // NOBARRIER: lj_meta_tset ensures the table is not black.
| ins_next1
| sd CARG1, 0(CRET1)
| ins_next2
|
|3: // Call __newindex metamethod.
| // BASE = base, L->top = new base, stack = cont/func/t/k/(v)
| daddiu TMP1, BASE, -FRAME_CONT
| ld BASE, L->top
| sd PC, -24(BASE) // [cont|PC]
| dsubu PC, BASE, TMP1
| ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
| cleartp LFUNC:RB
| sd CARG1, 16(BASE) // Copy value to third argument.
| b ->vm_call_dispatch_f
|. li NARGS8:RC, 24 // 3 args for func(t, k, v)
|
|->vmeta_tsetr:
| load_got lj_tab_setinth
| sd BASE, L->base
| sd PC, SAVE_PC
| call_intern lj_tab_setinth // (lua_State *L, GCtab *t, int32_t key)
|. move CARG1, L
| // Returns TValue *.
| b ->BC_TSETR_Z
|. nop
|
|//-- Comparison metamethods ---------------------------------------------
|
|->vmeta_comp:
| // RA/RD point to o1/o2.
| move CARG2, RA
| move CARG3, RD
| load_got lj_meta_comp
| daddiu PC, PC, -4
| sd BASE, L->base
| sd PC, SAVE_PC
| decode_OP1 CARG4, INS
| call_intern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op)
|. move CARG1, L
| // Returns 0/1 or TValue * (metamethod).
|3:
| sltiu AT, CRET1, 2
| beqz AT, ->vmeta_binop
| negu TMP2, CRET1
|4:
| lhu RD, OFS_RD(PC)
| daddiu PC, PC, 4
| lui TMP1, (-(BCBIAS_J*4 >> 16) & 65535)
| sll RD, RD, 2
| addu RD, RD, TMP1
| and RD, RD, TMP2
| daddu PC, PC, RD
|->cont_nop:
| ins_next
|
|->cont_ra: // RA = resultptr
| lbu TMP1, -4+OFS_RA(PC)
| ld CRET1, 0(RA)
| sll TMP1, TMP1, 3
| daddu TMP1, BASE, TMP1
| b ->cont_nop
|. sd CRET1, 0(TMP1)
|
|->cont_condt: // RA = resultptr
| ld TMP0, 0(RA)
| gettp TMP0, TMP0
| sltiu AT, TMP0, LJ_TISTRUECOND
| b <4
|. negu TMP2, AT // Branch if result is true.
|
|->cont_condf: // RA = resultptr
| ld TMP0, 0(RA)
| gettp TMP0, TMP0
| sltiu AT, TMP0, LJ_TISTRUECOND
| b <4
|. addiu TMP2, AT, -1 // Branch if result is false.
|
|->vmeta_equal:
| // CARG1/CARG2 point to o1/o2. TMP0 is set to 0/1.
| load_got lj_meta_equal
| cleartp LFUNC:CARG3, CARG2
| cleartp LFUNC:CARG2, CARG1
| move CARG4, TMP0
| daddiu PC, PC, -4
| sd BASE, L->base
| sd PC, SAVE_PC
| call_intern lj_meta_equal // (lua_State *L, GCobj *o1, *o2, int ne)
|. move CARG1, L
| // Returns 0/1 or TValue * (metamethod).
| b <3
|. nop
|
|->vmeta_equal_cd:
|.if FFI
| load_got lj_meta_equal_cd
| move CARG2, INS
| daddiu PC, PC, -4
| sd BASE, L->base
| sd PC, SAVE_PC
| call_intern lj_meta_equal_cd // (lua_State *L, BCIns op)
|. move CARG1, L
| // Returns 0/1 or TValue * (metamethod).
| b <3
|. nop
|.endif
|
|->vmeta_istype:
| load_got lj_meta_istype
| daddiu PC, PC, -4
| sd BASE, L->base
| srl CARG2, RA, 3
| srl CARG3, RD, 3
| sd PC, SAVE_PC
| call_intern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp)
|. move CARG1, L
| b ->cont_nop
|. nop
|
|//-- Arithmetic metamethods ---------------------------------------------
|
|->vmeta_unm:
| move RC, RB
|
|->vmeta_arith:
| load_got lj_meta_arith
| sd BASE, L->base
| move CARG2, RA
| sd PC, SAVE_PC
| move CARG3, RB
| move CARG4, RC
| decode_OP1 CARG5, INS // CARG5 == RB.
| call_intern lj_meta_arith // (lua_State *L, TValue *ra,*rb,*rc, BCReg op)
|. move CARG1, L
| // Returns NULL (finished) or TValue * (metamethod).
| beqz CRET1, ->cont_nop
|. nop
|
| // Call metamethod for binary op.
|->vmeta_binop: