Update RoT memory map to reserve RAM for updates

[labbott]

Due to system constraints there is no alternate image for the stage0 bootloader. This makes updating it a riskier proposition than Hubris since a broken stage0 may be equivalent to a bricked board. To reduce risk, we can reserve a region of RAM for staging an update before committing to flash.

Section 2.1.8 of the LPC55 manual gives a table of RAM layouts. The final product will use the 320 KB layout. We have a size limit of 64K for stage0. We've been testing with the 256KB layout which lacks RAM3 and we aren't running into any limitations so reserving RAM3 looks plausible.

[cbiffle]

Currently what we're planning on doing here is allocating enough of a buffer in the update-server task to store all of stage0 before beginning an update. Since stage0 is now ~4 kiB with signature that has become much easier.

I'm not sure the work is done so I'm leaving this open and marking MVP.