Execute 10 random programs successful on core

[GorgeousWalrus]

Execute 10 random programs successful on core (to find errors)

• 1
• 2
• 3
• 4
• 5
• 6
• 7
• 8
• 9
• 10

[GorgeousWalrus]

Found issues in MEM stage:

• Clear lsu_valid when ack comes in from WB stage
• Separate lsu_valid signals for reading and writing. Otherwise, the valid signal from either can trigger the next instruction of the other type to be valid although it isn't

Found issues in LSU:

• data_o not stable on load unit
• wishbone signals not correctly cleared

[GorgeousWalrus]

First program successful

int main() {
    int *addr = (int*)100;
    for(int i = 0; i < 10; i++) {
        (*addr) = i;
        addr+=1;
    }
    while(1);
}

[GorgeousWalrus]

Found issue when executing AUIPC/JAL/JALR: #13

[GorgeousWalrus]

After 3 extensive programs, I will conclude this issue for now