-
Notifications
You must be signed in to change notification settings - Fork 0
/
rol_6_bit.v
51 lines (49 loc) · 890 Bytes
/
rol_6_bit.v
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
module rol_6_bit(
input wire [5:0] a,
input wire [5:0] b,
input wire cf_prev,
output wire [5:0] r,
output wire cf,
output wire sf,
output wire zf
);
reg [5:0] _r;
reg _cf;
always @(*)
begin
if (b%6 == 0)
begin
_r = a;
_cf = cf_prev;
end
else if (b%6 == 1)
begin
_r = {a[4:0], a[5]};
_cf = a[5];
end
else if (b%6 == 2)
begin
_r = {a[3:0], a[5:4]};
_cf = a[5:4];
end
else if (b%6 == 3)
begin
_r = {a[2:0], a[5:3]};
_cf = a[5:3];
end
else if (b%6 == 4)
begin
_r = {a[1:0], a[5:2]};
_cf = a[5:2];
end
else if (b%6 == 5)
begin
_r = {a[0], a[5:1]};
_cf = a[5:1];
end
end
assign r = _r;
assign cf = _cf;
assign sf = _r[5];
assign zf = ~_r[0] & ~_r[1] & ~_r[2] & ~_r[3] & ~_r[4] & ~_r[5];
endmodule